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Re: [PATCH 3/3] IPI: Avoid to use 2 cache lines for one call_single_data

From "Huang\, Ying" <ying.huang@intel.com>
Newsgroups linux.kernel
Subject Re: [PATCH 3/3] IPI: Avoid to use 2 cache lines for one call_single_data
Date 2017-08-28 07:20 +0200
Message-ID <ujkCS-1lB-9@gated-at.bofh.it> (permalink)
References (7 earlier) <uaH5D-5ax-3@gated-at.bofh.it> <uaVrX-5Ua-11@gated-at.bofh.it> <ubLAe-5Ov-17@gated-at.bofh.it> <uc4tb-2HR-13@gated-at.bofh.it> <uegqe-au-9@gated-at.bofh.it>
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"Huang, Ying" <ying.huang@intel.com> writes:

> Hi, Peter,
>
> "Huang, Ying" <ying.huang@intel.com> writes:
>
>> Peter Zijlstra <peterz@infradead.org> writes:
>>
>>> On Sat, Aug 05, 2017 at 08:47:02AM +0800, Huang, Ying wrote:
>>>> Yes.  That looks good.  So you will prepare the final patch?  Or you
>>>> hope me to do that?
>>>
>>> I was hoping you'd do it ;-)
>>
>> Thanks!  Here is the updated patch
>>
>> Best Regards,
>> Huang, Ying
>>
>> ---------->8----------
>> From 957735e9ff3922368286540dab852986fc7b23b5 Mon Sep 17 00:00:00 2001
>> From: Huang Ying <ying.huang@intel.com>
>> Date: Mon, 7 Aug 2017 16:55:33 +0800
>> Subject: [PATCH -v3] IPI: Avoid to use 2 cache lines for one
>>  call_single_data
>>
>> struct call_single_data is used in IPI to transfer information between
>> CPUs.  Its size is bigger than sizeof(unsigned long) and less than
>> cache line size.  Now, it is allocated with no explicit alignment
>> requirement.  This makes it possible for allocated call_single_data to
>> cross 2 cache lines.  So that double the number of the cache lines
>> that need to be transferred among CPUs.
>>
>> This is resolved by requiring call_single_data to be aligned with the
>> size of call_single_data.  Now the size of call_single_data is the
>> power of 2.  If we add new fields to call_single_data, we may need to
>> add pads to make sure the size of new definition is the power of 2.
>> Fortunately, this is enforced by gcc, which will report error for not
>> power of 2 alignment requirement.
>>
>> To set alignment requirement of call_single_data to the size of
>> call_single_data, a struct definition and a typedef is used.
>>
>> To test the effect of the patch, we use the vm-scalability multiple
>> thread swap test case (swap-w-seq-mt).  The test will create multiple
>> threads and each thread will eat memory until all RAM and part of swap
>> is used, so that huge number of IPI will be triggered when unmapping
>> memory.  In the test, the throughput of memory writing improves ~5%
>> compared with misaligned call_single_data because of faster IPI.
>
> What do you think about this version?
>

Ping.

Best Regards,
Huang, Ying

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Re: [PATCH 3/3] IPI: Avoid to use 2 cache lines for one call_single_data "Huang\, Ying" <ying.huang@intel.com> - 2017-08-28 07:20 +0200
  Re: [PATCH 3/3] IPI: Avoid to use 2 cache lines for one  call_single_data Peter Zijlstra <peterz@infradead.org> - 2017-08-28 10:50 +0200

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