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Groups > linux.kernel > #1719362
| From | Yu Zhang <yu.c.zhang@linux.intel.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v3 2/5] KVM: MMU: check guest CR3 reserved bits based on its physical address width. |
| Date | 2017-08-24 18:10 +0200 |
| Message-ID | <ui2RH-kG-1@gated-at.bofh.it> (permalink) |
| References | <uhZTP-6H8-5@gated-at.bofh.it> <uhZTQ-6H8-25@gated-at.bofh.it> <ui0Gf-7fv-27@gated-at.bofh.it> <ui2yl-8q8-5@gated-at.bofh.it> <ui2I1-8tG-13@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On 8/24/2017 11:50 PM, Paolo Bonzini wrote:
> On 24/08/2017 17:23, Yu Zhang wrote:
>>>> static inline u64 rsvd_bits(int s, int e)
>>>> {
>>>> + if (e < s)
>>>> + return 0;
>>>> +
>>>> return ((1ULL << (e - s + 1)) - 1) << s;
>>>> }
>>> e = s - 1 is already supported; why do you need e <= s - 2?
>> Sorry? I do not quite understand. When will e = s - 1?
> Is there any case where e < s? I can see that MAXPHYADDR=63 gives
> rsvd_bits(63, 62), but that works.
>
> In practice, MAXPHYADDR will never be 59 even because the PKRU bits are
> at bits 59..62.
Thanks, Paolo.
I see. I had made an assumption that MAXPHYADDR shall not exceed the
physical one,
which is 52 I believe. But I'm not sure there's any place to check this.
Maybe we should make sure the vcpu->arch.maxphyaddr will not be greater
than the
value of the host?
Yu
>
> Paolo
>
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[PATCH v3 0/5] KVM: MMU: 5 level EPT/shadow support Yu Zhang <yu.c.zhang@linux.intel.com> - 2017-08-24 15:00 +0200
[PATCH v3 4/5] KVM: MMU: Add 5 level EPT & Shadow page table support. Yu Zhang <yu.c.zhang@linux.intel.com> - 2017-08-24 15:00 +0200
Re: [PATCH v3 4/5] KVM: MMU: Add 5 level EPT & Shadow page table support. Paolo Bonzini <pbonzini@redhat.com> - 2017-08-24 15:50 +0200
[PATCH v3 1/5] KVM: x86: Add return value to kvm_cpuid(). Yu Zhang <yu.c.zhang@linux.intel.com> - 2017-08-24 15:00 +0200
[PATCH v3 5/5] KVM: MMU: Expose the LA57 feature to VM. Yu Zhang <yu.c.zhang@linux.intel.com> - 2017-08-24 15:00 +0200
[PATCH v3 2/5] KVM: MMU: check guest CR3 reserved bits based on its physical address width. Yu Zhang <yu.c.zhang@linux.intel.com> - 2017-08-24 15:00 +0200
Re: [PATCH v3 2/5] KVM: MMU: check guest CR3 reserved bits based on its physical address width. Paolo Bonzini <pbonzini@redhat.com> - 2017-08-24 15:50 +0200
Re: [PATCH v3 2/5] KVM: MMU: check guest CR3 reserved bits based on its physical address width. Yu Zhang <yu.c.zhang@linux.intel.com> - 2017-08-24 17:50 +0200
Re: [PATCH v3 2/5] KVM: MMU: check guest CR3 reserved bits based on its physical address width. Paolo Bonzini <pbonzini@redhat.com> - 2017-08-24 18:00 +0200
Re: [PATCH v3 2/5] KVM: MMU: check guest CR3 reserved bits based on its physical address width. Yu Zhang <yu.c.zhang@linux.intel.com> - 2017-08-24 18:10 +0200
Re: [PATCH v3 2/5] KVM: MMU: check guest CR3 reserved bits based on its physical address width. Paolo Bonzini <pbonzini@redhat.com> - 2017-08-24 18:30 +0200
Re: [PATCH v3 2/5] KVM: MMU: check guest CR3 reserved bits based on its physical address width. Yu Zhang <yu.c.zhang@linux.intel.com> - 2017-08-24 18:50 +0200
Re: [PATCH v3 2/5] KVM: MMU: check guest CR3 reserved bits based on its physical address width. Paolo Bonzini <pbonzini@redhat.com> - 2017-08-24 19:00 +0200
Re: [PATCH v3 0/5] KVM: MMU: 5 level EPT/shadow support Paolo Bonzini <pbonzini@redhat.com> - 2017-08-24 15:50 +0200
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