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Groups > linux.kernel > #1716987
| From | Rob Herring <robh@kernel.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 4/6] dt-bindings: host1x: Fix and add Tegra186 information |
| Date | 2017-08-22 04:40 +0200 |
| Message-ID | <uh7gJ-4pa-9@gated-at.bofh.it> (permalink) |
| References | <ufybn-mh-3@gated-at.bofh.it> <ufybo-mh-25@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Thu, Aug 17, 2017 at 09:54:11PM +0300, Mikko Perttunen wrote: > Add note that address/size-cells should be 2 on 64-bit systems, > and add Tegra186-specific register range properties. Generally the cell sizes have nothing to do with the addressing size of the cpu. They should be as small as what fits for the given sub-tree. If all the register space fits into 4GB, then there's no reason for the #size-cells to be 2. The same is true if the sub-tree has a parent bus. Rob
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[PATCH 0/6] Host1x and VIC support for Tegra186 Mikko Perttunen <mperttunen@nvidia.com> - 2017-08-17 21:00 +0200
[PATCH 4/6] dt-bindings: host1x: Fix and add Tegra186 information Mikko Perttunen <mperttunen@nvidia.com> - 2017-08-17 21:00 +0200
Re: [PATCH 4/6] dt-bindings: host1x: Fix and add Tegra186 information Rob Herring <robh@kernel.org> - 2017-08-22 04:40 +0200
Re: [PATCH 5/6] gpu: host1x: Add Tegra186 support Dmitry Osipenko <digetx@gmail.com> - 2017-08-18 00:20 +0200
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