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Groups > linux.kernel > #1716132
| From | Thierry Reding <thierry.reding@gmail.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v3 2/6] pwm: mediatek: fix pwm source clock selection |
| Date | 2017-08-21 09:40 +0200 |
| Message-ID | <ugPtx-1lP-27@gated-at.bofh.it> (permalink) |
| References | <tXXhU-1Ih-11@gated-at.bofh.it> <tXXhU-1Ih-23@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
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On Fri, Jun 30, 2017 at 02:05:17PM +0800, Zhi Mao wrote: > In original code, the pwm output frequency is not correct > when set bit<3>=1 to PWMCON register. > > Signed-off-by: Zhi Mao <zhi.mao@mediatek.com> > --- > drivers/pwm/pwm-mediatek.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Applied to for-4.14/drivers, thanks. Thierry
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Re: [PATCH v3 2/6] pwm: mediatek: fix pwm source clock selection Thierry Reding <thierry.reding@gmail.com> - 2017-08-21 09:40 +0200
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