Re: [PATCH 0/5] arm-smmu: performance optimization

From	Will Deacon <will.deacon@arm.com>
Newsgroups	linux.kernel
Subject	Re: [PATCH 0/5] arm-smmu: performance optimization
Date	2017-08-17 16:40 +0200
Message-ID	<ufu7L-67i-19@gated-at.bofh.it> (permalink)
References	<tWCpb-2Xw-7@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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Thunder, Nate, Robin,

On Mon, Jun 26, 2017 at 09:38:45PM +0800, Zhen Lei wrote:
> I described the optimization more detail in patch 1 and 2, and patch 3-5 are
> the implementation on arm-smmu/arm-smmu-v3 of patch 2.
> 
> Patch 1 is v2. In v1, I directly replaced writel with writel_relaxed in
> queue_inc_prod. But Robin figured that it may lead SMMU consume stale
> memory contents. I thought more than 3 whole days and got this one.
> 
> This patchset is based on Robin Murphy's [PATCH v2 0/8] io-pgtable lock removal.

For the time being, I think we should focus on the new TLB flushing
interface posted by Joerg:

http://lkml.kernel.org/r/1502974596-23835-1-git-send-email-joro@8bytes.org

which looks like it can give us most of the benefits of this series. Once
we've got that, we can see what's left in the way of performance and focus
on the cmdq batching separately (because I'm still not convinced about it).

Thanks,

Will

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Re: [PATCH 0/5] arm-smmu: performance optimization Will Deacon <will.deacon@arm.com> - 2017-08-17 16:40 +0200
  Re: [PATCH 0/5] arm-smmu: performance optimization "Leizhen (ThunderTown)" <thunder.leizhen@huawei.com> - 2017-08-18 05:30 +0200
    Re: [PATCH 0/5] arm-smmu: performance optimization Will Deacon <will.deacon@arm.com> - 2017-08-18 10:40 +0200

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