Re: [PATCH] net: stmmac: socfgpa: Ensure emac bit set in sys manager for MII/GMII/SGMII.

From	Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Newsgroups	linux.kernel
Subject	Re: [PATCH] net: stmmac: socfgpa: Ensure emac bit set in sys manager for MII/GMII/SGMII.
Date	2017-08-18 12:00 +0200
Message-ID	<ufMem-1Qu-17@gated-at.bofh.it> (permalink)
References	<ufJqa-896-9@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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Hello!

On 8/18/2017 9:55 AM, Stephan Gatzka wrote:

> When using MII/GMII/SGMII in the Altera SoC, the phy needs to be
> wired through the FPGA. To ensure correct behavior, the appropriate
> bit in the System Manager FPGA Interface Group register needs to be
> set.
> 
> Signed-off-by: Stephan Gatzka <stephan.gatzka@gmail.com>
> ---
>   drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 5 ++++-
>   1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
> index 17d4bba..d7c231b 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
> @@ -269,7 +269,10 @@ static int socfpga_dwmac_set_phy_mode(struct socfpga_dwmac *dwmac)
>   	ctrl &= ~(SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << reg_shift);
>   	ctrl |= val << reg_shift;
>   
> -	if (dwmac->f2h_ptp_ref_clk) {
> +	if ((dwmac->f2h_ptp_ref_clk) ||
> +	    (phymode == PHY_INTERFACE_MODE_MII) ||
> +	    (phymode == PHY_INTERFACE_MODE_GMII) ||
> +	    (phymode == PHY_INTERFACE_MODE_SGMII)) {

    Inner parens not needed at all (especially the first pair).

[...]

MBR, Sergei

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[PATCH] net: stmmac: socfgpa: Ensure emac bit set in sys manager for MII/GMII/SGMII. Stephan Gatzka <stephan.gatzka@gmail.com> - 2017-08-18 09:00 +0200
  Re: [PATCH] net: stmmac: socfgpa: Ensure emac bit set in sys manager  for MII/GMII/SGMII. Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> - 2017-08-18 12:00 +0200

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