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Groups > linux.kernel > #1707493
| From | Casey Leedom <leedom@chelsio.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v9 1/4] PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING |
| Date | 2017-08-09 18:50 +0200 |
| Message-ID | <ucCle-1qq-35@gated-at.bofh.it> (permalink) |
| References | <ub1xo-1Ae-13@gated-at.bofh.it> <ub1xo-1Ae-19@gated-at.bofh.it> <ucCle-1qq-37@gated-at.bofh.it> <ucBIu-1bh-15@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
| From: Raj, Ashok <ashok.raj@intel.com> | Sent: Wednesday, August 9, 2017 8:58 AM | ... | As Casey pointed out in an earlier thread, we choose the heavy hammer | approach because there are some that can lead to data-corruption as opposed | to perf degradation. Careful. As far as I'm aware, there is no Data Corruption problem whatsoever with Intel Root Ports and processing of Transaction Layer Packets with and without the Relaxed Ordering Attribute set. The only issue which we've discovered with relatively recent Intel Root Port implementations and the use of the Relaxed Ordering Attribute is a performance issue. To the best of our ability to analyze the PCIe traces, it appeared that the Intel Root Complex delayed returning Link Flow Control Credits resulting in lowered performance (total bandwidth). When we used Relaxed Ordering for Ingress Packet Data delivery on a 100Gb/s Ethernet link with 1500-byte MTU, we were pegged at ~75Gb/s. Once we disabled Relaxed Ordering, we were able to deliver Ingress Packet Data to Host Memory at the full link rate. Casey
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[PATCH v9 1/4] PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING Ding Tianhong <dingtianhong@huawei.com> - 2017-08-05 09:20 +0200
Re: [PATCH v9 1/4] PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING Bjorn Helgaas <helgaas@kernel.org> - 2017-08-09 01:30 +0200
Re: [PATCH v9 1/4] PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING Casey Leedom <leedom@chelsio.com> - 2017-08-09 03:50 +0200
Re: [PATCH v9 1/4] PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING Bjorn Helgaas <helgaas@kernel.org> - 2017-08-09 05:10 +0200
Re: [PATCH v9 1/4] PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING Ding Tianhong <dingtianhong@huawei.com> - 2017-08-09 14:20 +0200
Re: [PATCH v9 1/4] PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING "Raj, Ashok" <ashok.raj@intel.com> - 2017-08-09 18:10 +0200
Re: [PATCH v9 1/4] PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING Casey Leedom <leedom@chelsio.com> - 2017-08-09 18:50 +0200
Re: [PATCH v9 1/4] PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING "Raj, Ashok" <ashok.raj@intel.com> - 2017-08-09 20:10 +0200
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