Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1705020
| From | Chris Packham <chris.packham@alliedtelesis.co.nz> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 2/3] ARM: dts: mvebu: set reduced-width property for SDRAM on 98dx3236 |
| Date | 2017-08-07 00:40 +0200 |
| Message-ID | <ubCng-893-29@gated-at.bofh.it> (permalink) |
| References | <ubCng-893-19@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Because the 98dx3236 and similar SoCs are switch chips with integrated
CPUs they use a reduced pin count for the SDRAM interface. As such
"full" with is 32-bits and "half" width is 16-bits (as opposed to 64/32
on the discrete SoC). Set the reduced-width property on the sdramc node
to indicate this.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
arch/arm/boot/dts/armada-xp-98dx3236.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi
index 0e12816d961e..4d6a2acc1b55 100644
--- a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi
+++ b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi
@@ -129,6 +129,7 @@
sdramc@1400 {
compatible = "marvell,armada-xp-sdram-controller";
reg = <0x1400 0x500>;
+ marvell,reduced-width;
};
L2: l2-cache@8000 {
--
2.13.0
Back to linux.kernel | Previous | Next | Find similar | Unroll thread
[PATCH 2/3] ARM: dts: mvebu: set reduced-width property for SDRAM on 98dx3236 Chris Packham <chris.packham@alliedtelesis.co.nz> - 2017-08-07 00:40 +0200
csiph-web