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Groups > linux.kernel > #1699919
| From | Elaine Zhang <zhangqing@rock-chips.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v3 2/2] dt-bindings: add documentation for rk3126 clock |
| Date | 2017-07-31 12:40 +0200 |
| Message-ID | <u9ghc-57H-21@gated-at.bofh.it> (permalink) |
| References | <u9ghb-57H-13@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
This add bindings documentation for rk3126 SoCs. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> --- Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt index 455a9a00a623..25098fa8595f 100644 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt @@ -1,12 +1,12 @@ -* Rockchip RK3128 Clock and Reset Unit +* Rockchip RK3128/RK3126 Clock and Reset Unit -The RK3128 clock controller generates and supplies clock to various +The RK3128/RK3126 clock controller generates and supplies clock to various controllers within the SoC and also implements a reset controller for SoC peripherals. Required Properties: -- compatible: should be "rockchip,rk3128-cru" +- compatible: should be "rockchip,rk3128-cru", "rockchip,rk3126-cru" - reg: physical base address of the controller and length of memory mapped region. - #clock-cells: should be 1. -- 1.9.1
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[PATCH v3 0/2] clk: rockchip: support clk drivers for RK3126 SoC. Elaine Zhang <zhangqing@rock-chips.com> - 2017-07-31 12:40 +0200
[PATCH v3 2/2] dt-bindings: add documentation for rk3126 clock Elaine Zhang <zhangqing@rock-chips.com> - 2017-07-31 12:40 +0200
Re: [PATCH v3 2/2] dt-bindings: add documentation for rk3126 clock Heiko Stübner <heiko@sntech.de> - 2017-07-31 13:30 +0200
[PATCH v3 1/2] clk: rockchip: rk3128: modify rk3128 clk driver to support rk3126 Elaine Zhang <zhangqing@rock-chips.com> - 2017-07-31 12:40 +0200
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