Re: [PATCH -tip v7 1/2] irq: Make irqentry text section unconditional

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From	kbuild test robot <lkp@intel.com>
Newsgroups	linux.kernel
Subject	Re: [PATCH -tip v7 1/2] irq: Make irqentry text section unconditional
Date	Sat, 29 Jul 2017 13:20:01 +0200
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Hi Masami,

[auto build test ERROR on tip/x86/core]
[also build test ERROR on v4.13-rc2 next-20170728]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Masami-Hiramatsu/irq-Make-irqentry-text-section-unconditional/20170729-170710
config: xtensa-common_defconfig (attached as .config)
compiler: xtensa-linux-gcc (GCC) 4.9.0
reproduce:
        wget https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        make.cross ARCH=xtensa 

All errors (new ones prefixed by >>):

>> arch/xtensa/kernel/setup.c:276:13: error: conflicting types for '_end'
    extern char _end;
                ^
   In file included from ./arch/xtensa/include/generated/asm/sections.h:1:0,
                    from include/linux/interrupt.h:21,
                    from include/linux/pci.h:31,
                    from arch/xtensa/include/asm/platform.h:15,
                    from arch/xtensa/kernel/setup.c:43:
   include/asm-generic/sections.h:39:13: note: previous declaration of '_end' was here
    extern char _end[];
                ^
>> arch/xtensa/kernel/setup.c:277:13: error: conflicting types for '_stext'
    extern char _stext;
                ^
   In file included from ./arch/xtensa/include/generated/asm/sections.h:1:0,
                    from include/linux/interrupt.h:21,
                    from include/linux/pci.h:31,
                    from arch/xtensa/include/asm/platform.h:15,
                    from arch/xtensa/kernel/setup.c:43:
   include/asm-generic/sections.h:33:22: note: previous declaration of '_stext' was here
    extern char _text[], _stext[], _etext[];
                         ^

vim +/_stext +277 arch/xtensa/kernel/setup.c

5a0015d62 Chris Zankel  2005-06-23  271  
5a0015d62 Chris Zankel  2005-06-23  272  /*
5a0015d62 Chris Zankel  2005-06-23  273   * Initialize system. Setup memory and reserve regions.
5a0015d62 Chris Zankel  2005-06-23  274   */
5a0015d62 Chris Zankel  2005-06-23  275  
5a0015d62 Chris Zankel  2005-06-23 @276  extern char _end;
5a0015d62 Chris Zankel  2005-06-23 @277  extern char _stext;
5a0015d62 Chris Zankel  2005-06-23  278  extern char _WindowVectors_text_start;
5a0015d62 Chris Zankel  2005-06-23  279  extern char _WindowVectors_text_end;
5a0015d62 Chris Zankel  2005-06-23  280  extern char _DebugInterruptVector_literal_start;
5a0015d62 Chris Zankel  2005-06-23  281  extern char _DebugInterruptVector_text_end;
5a0015d62 Chris Zankel  2005-06-23  282  extern char _KernelExceptionVector_literal_start;
5a0015d62 Chris Zankel  2005-06-23  283  extern char _KernelExceptionVector_text_end;
5a0015d62 Chris Zankel  2005-06-23  284  extern char _UserExceptionVector_literal_start;
5a0015d62 Chris Zankel  2005-06-23  285  extern char _UserExceptionVector_text_end;
5a0015d62 Chris Zankel  2005-06-23  286  extern char _DoubleExceptionVector_literal_start;
5a0015d62 Chris Zankel  2005-06-23  287  extern char _DoubleExceptionVector_text_end;
2d1c645cc Marc Gauthier 2013-01-05  288  #if XCHAL_EXCM_LEVEL >= 2
2d1c645cc Marc Gauthier 2013-01-05  289  extern char _Level2InterruptVector_text_start;
2d1c645cc Marc Gauthier 2013-01-05  290  extern char _Level2InterruptVector_text_end;
2d1c645cc Marc Gauthier 2013-01-05  291  #endif
2d1c645cc Marc Gauthier 2013-01-05  292  #if XCHAL_EXCM_LEVEL >= 3
2d1c645cc Marc Gauthier 2013-01-05  293  extern char _Level3InterruptVector_text_start;
2d1c645cc Marc Gauthier 2013-01-05  294  extern char _Level3InterruptVector_text_end;
2d1c645cc Marc Gauthier 2013-01-05  295  #endif
2d1c645cc Marc Gauthier 2013-01-05  296  #if XCHAL_EXCM_LEVEL >= 4
2d1c645cc Marc Gauthier 2013-01-05  297  extern char _Level4InterruptVector_text_start;
2d1c645cc Marc Gauthier 2013-01-05  298  extern char _Level4InterruptVector_text_end;
2d1c645cc Marc Gauthier 2013-01-05  299  #endif
2d1c645cc Marc Gauthier 2013-01-05  300  #if XCHAL_EXCM_LEVEL >= 5
2d1c645cc Marc Gauthier 2013-01-05  301  extern char _Level5InterruptVector_text_start;
2d1c645cc Marc Gauthier 2013-01-05  302  extern char _Level5InterruptVector_text_end;
2d1c645cc Marc Gauthier 2013-01-05  303  #endif
2d1c645cc Marc Gauthier 2013-01-05  304  #if XCHAL_EXCM_LEVEL >= 6
2d1c645cc Marc Gauthier 2013-01-05  305  extern char _Level6InterruptVector_text_start;
2d1c645cc Marc Gauthier 2013-01-05  306  extern char _Level6InterruptVector_text_end;
2d1c645cc Marc Gauthier 2013-01-05  307  #endif
ab45fb145 Max Filippov  2015-10-16  308  #ifdef CONFIG_SMP
ab45fb145 Max Filippov  2015-10-16  309  extern char _SecondaryResetVector_text_start;
ab45fb145 Max Filippov  2015-10-16  310  extern char _SecondaryResetVector_text_end;
ab45fb145 Max Filippov  2015-10-16  311  #endif
5a0015d62 Chris Zankel  2005-06-23  312  

:::::: The code at line 277 was first introduced by commit
:::::: 5a0015d62668e64c8b6e02e360fbbea121bfd5e6 [PATCH] xtensa: Architecture support for Tensilica Xtensa Part 3

:::::: TO: Chris Zankel <czankel@tensilica.com>
:::::: CC: Linus Torvalds <torvalds@ppc970.osdl.org>

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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[PATCH -tip v7 1/2] irq: Make irqentry text section unconditional Masami Hiramatsu <mhiramat@kernel.org> - 2017-07-28 16:10 +0200
  Re: [PATCH -tip v7 1/2] irq: Make irqentry text section unconditional kbuild test robot <lkp@intel.com> - 2017-07-29 13:20 +0200
    Re: [PATCH -tip v7 1/2] irq: Make irqentry text section  unconditional Masami Hiramatsu <mhiramat@kernel.org> - 2017-07-30 05:10 +0200
  Re: [PATCH -tip v7 1/2] irq: Make irqentry text section unconditional kbuild test robot <lkp@intel.com> - 2017-07-29 13:20 +0200

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