Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]


Groups > linux.kernel > #1699010

Re: [RFC 02/12] clk: qcom: flag for 64 bit CONFIG_CTL

From Stephen Boyd <sboyd@codeaurora.org>
Newsgroups linux.kernel
Subject Re: [RFC 02/12] clk: qcom: flag for 64 bit CONFIG_CTL
Date 2017-07-28 20:40 +0200
Message-ID <u8il4-7oj-27@gated-at.bofh.it> (permalink)
References <u7OZH-5qs-3@gated-at.bofh.it> <u7OZH-5qs-17@gated-at.bofh.it>
Organization linux.* mail to news gateway

Show all headers | View raw


On 07/27, Abhishek Sahu wrote:
> diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
> index 47a1da3..e6cde2d 100644
> --- a/drivers/clk/qcom/clk-alpha-pll.c
> +++ b/drivers/clk/qcom/clk-alpha-pll.c
> @@ -118,7 +118,10 @@ void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
>  	regmap_write(regmap, off + PLL_L_VAL, config->l);
>  	regmap_write(regmap, off + PLL_ALPHA_VAL, config->alpha);
>  	regmap_write(regmap, off + PLL_CONFIG_CTL, config->config_ctl_val);
> -	regmap_write(regmap, off + PLL_CONFIG_CTL_U, config->config_ctl_hi_val);
> +
> +	if (pll->flags & SUPPORTS_64BIT_CONFIG_CTL)
> +		regmap_write(regmap, off + PLL_CONFIG_CTL_U,
> +			     config->config_ctl_hi_val);

Is there a hole there? I mean a RAZ/WI register so we can just
keep writing it and not care?

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Back to linux.kernel | Previous | NextPrevious in thread | Next in thread | Find similar | Unroll thread


Thread

[RFC 02/12] clk: qcom: flag for 64 bit CONFIG_CTL Abhishek Sahu <absahu@codeaurora.org> - 2017-07-27 13:20 +0200
  Re: [RFC 02/12] clk: qcom: flag for 64 bit CONFIG_CTL Stephen Boyd <sboyd@codeaurora.org> - 2017-07-28 20:40 +0200
    Re: [RFC 02/12] clk: qcom: flag for 64 bit CONFIG_CTL Abhishek Sahu <absahu@codeaurora.org> - 2017-07-30 15:10 +0200

csiph-web