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Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

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On 07/26/2017 10:33 AM, Greg KH wrote:
> On Wed, Jul 26, 2017 at 06:30:49PM +0200, Borislav Petkov wrote:
>> On Wed, Jul 26, 2017 at 09:19:49AM -0700, Greg KH wrote:
>>> On Wed, Jul 26, 2017 at 05:55:48PM +0200, Borislav Petkov wrote:
>>>> On Wed, Jul 26, 2017 at 05:45:15PM +0200, Jan Glauber wrote:
>>>>> The PMU/EDAC devices are all PCI devices do I need the 'struct pci_dev *'.
>>>>> I'm not aware of other ways to access these devices. Please enlighten
>>>>> me if I'm missing something.
>>>>
>>>> Me enlighten you on Cavium hardware?! You're funny.
>>>>
>>>> So I don't know whether the PCI hotplug code can run more than one
>>>> function upon PCI ID detection. Probably Greg will say, write a
>>>> multiplexer wrapper. :-)
>>>
>>> -ENOCONTEXT....
>>>
>>> Anyway, pci questions are best asked on the linux-pci@vger list.  And
>>> yes, all PCI devices end up with a 'struct pci_dev *' automatically.
>>
>> Simple: so they have a PCI ID of a memory contoller and want to hotplug
>> two drivers for it. And those two drivers should remain independent from
>> each other.
> 
> Hahahahaha, no.  That's crazy, you were right in guessing what my answer
> was going to be :)
> 


Just to be clear about the situation, the device is a memory controller. 
  It has two main behaviors we are interested in:

A) Error Detection And Correction (EDAC).  This should be connected to 
the kernel's EDAC subsystem.  An existing driver 
(drivers/edac/thunderx_edac.c) does exactly this.

B) Performance Counters for actions taken in the corresponding memory. 
This should be connected to the kernel's perf framework as an uncore-PMU 
(the subject of this patch set).

It is a single PCI device.  What should the driver architecture look 
like to connect it to two different kernel subsystems?

Thanks,
David Daney

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Thread

[PATCH v8 0/3] Cavium ARM64 uncore PMU support Jan Glauber <jglauber@cavium.com> - 2017-07-25 17:10 +0200
  [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters Jan Glauber <jglauber@cavium.com> - 2017-07-25 17:10 +0200
    Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2017-07-25 17:40 +0200
      Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2017-07-26 14:50 +0200
        Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2017-07-26 16:40 +0200
          Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Borislav Petkov <bp@alien8.de> - 2017-07-26 17:00 +0200
            Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2017-07-26 17:20 +0200
              Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Borislav Petkov <bp@alien8.de> - 2017-07-26 17:30 +0200
              Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Jonathan Cameron <Jonathan.Cameron@huawei.com> - 2017-07-26 18:30 +0200
            Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Borislav Petkov <bp@alien8.de> - 2017-07-26 17:40 +0200
              Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Borislav Petkov <bp@alien8.de> - 2017-07-26 18:00 +0200
                Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Greg KH <gregkh@linuxfoundation.org> - 2017-07-26 18:30 +0200
                Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Borislav Petkov <bp@alien8.de> - 2017-07-26 18:40 +0200
                Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Greg KH <gregkh@linuxfoundation.org> - 2017-07-26 19:40 +0200
                Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters David Daney <ddaney.cavm@gmail.com> - 2017-07-26 22:10 +0200
                Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Greg KH <gregkh@linuxfoundation.org> - 2017-07-26 22:10 +0200
                Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters David Daney <ddaney.cavm@gmail.com> - 2017-07-26 23:10 +0200
                Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Greg KH <gregkh@linuxfoundation.org> - 2017-07-27 04:30 +0200
                Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters David Daney <ddaney.cavm@gmail.com> - 2017-07-27 19:40 +0200
                Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Greg KH <gregkh@linuxfoundation.org> - 2017-07-28 03:20 +0200
                Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Borislav Petkov <bp@alien8.de> - 2017-07-28 09:30 +0200
                Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Borislav Petkov <bp@alien8.de> - 2017-07-27 07:20 +0200
                Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Borislav Petkov <bp@alien8.de> - 2017-07-27 15:20 +0200
                Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Greg KH <gregkh@linuxfoundation.org> - 2017-07-29 01:20 +0200
    Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU  counters Jonathan Cameron <Jonathan.Cameron@huawei.com> - 2017-07-25 18:00 +0200
  [PATCH v8 2/3] perf: cavium: Support transmit-link PMU counters Jan Glauber <jglauber@cavium.com> - 2017-07-25 17:10 +0200

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