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Groups > linux.kernel > #1692445
| From | Varadarajan Narayanan <varada@codeaurora.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v3 0/8] Add support for IPQ8074 PCIe phy and controller |
| Date | 2017-07-20 07:40 +0200 |
| Message-ID | <u5clP-2N9-3@gated-at.bofh.it> (permalink) |
| Organization | linux.* mail to news gateway |
v3: PCI: dwc: qcom: Add support for IPQ8074 PCIe controller Incoporate Stan's feedback:- - Add SoC Wrapper and Synopsys Core IP versions v2: dt-bindings: phy: qmp: Add output-clock-names Added Rob H's Ack dt-bindings: phy: qmp: Add support for QMP phy in IPQ8074 Removed example Added IPQ8074 specific details phy: qcom-qmp: Fix phy pipe clock name Added Vivek's Ack phy: qcom-qmp: Handle unavailable registers No changes phy: qcom-qmp: Add support for IPQ8074 No changes PCI: dwc: qcom: Use block IP version for operations Added new patch to use block IP version instead of v1, v2... dt-bindings: pci: qcom: Add support for IPQ8074 Removed example Added IPQ8074 specific details PCI: dwc: qcom: Add support for IPQ8074 PCIe controller Incorporated Bjorn's feedback:- - Removed reset names, helper function to assert/deassert, helper function to R/M/W register. - Renamed sys_noc clock as iface clock - Added deinit if phy power on fails v1: Add definitions required to enable QMP phy support for IPQ8074. Add support for the IPQ8074 PCIe controller. IPQ8074 supports Gen 1/2, one lane, two PCIe root complex with support for MSI and legacy interrupts, and it conforms to PCI Express Base 2.1 specification. Varadarajan Narayanan (8): dt-bindings: phy: qmp: Add output-clock-names dt-bindings: phy: qmp: Add support for QMP phy in IPQ8074 phy: qcom-qmp: Fix phy pipe clock name phy: qcom-qmp: Handle unavailable registers phy: qcom-qmp: Add support for IPQ8074 PCI: dwc: qcom: Use block IP version for operations dt-bindings: pci: qcom: Add support for IPQ8074 PCI: dwc: qcom: Add support for IPQ8074 PCIe controller .../devicetree/bindings/pci/qcom,pcie.txt | 23 ++ .../devicetree/bindings/phy/qcom-qmp-phy.txt | 11 + drivers/pci/dwc/pcie-qcom.c | 378 +++++++++++++++++---- drivers/phy/qualcomm/phy-qcom-qmp.c | 186 ++++++++-- 4 files changed, 515 insertions(+), 83 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
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[PATCH v3 0/8] Add support for IPQ8074 PCIe phy and controller Varadarajan Narayanan <varada@codeaurora.org> - 2017-07-20 07:40 +0200 [PATCH v3 5/8] phy: qcom-qmp: Add support for IPQ8074 Varadarajan Narayanan <varada@codeaurora.org> - 2017-07-20 07:40 +0200 [PATCH v3 2/8] dt-bindings: phy: qmp: Add support for QMP phy in IPQ8074 Varadarajan Narayanan <varada@codeaurora.org> - 2017-07-20 07:40 +0200 [PATCH v3 1/8] dt-bindings: phy: qmp: Add output-clock-names Varadarajan Narayanan <varada@codeaurora.org> - 2017-07-20 07:40 +0200 [PATCH v3 4/8] phy: qcom-qmp: Handle unavailable registers Varadarajan Narayanan <varada@codeaurora.org> - 2017-07-20 07:40 +0200 [PATCH v3 8/8] PCI: dwc: qcom: Add support for IPQ8074 PCIe controller Varadarajan Narayanan <varada@codeaurora.org> - 2017-07-20 07:40 +0200
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