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Groups > linux.kernel > #1685241
| From | Palmer Dabbelt <palmer@dabbelt.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [patches] Re: [PATCH 16/17] RISC-V: User-facing API |
| Date | 2017-07-11 19:30 +0200 |
| Message-ID | <u2790-5cu-35@gated-at.bofh.it> (permalink) |
| References | <u241r-3kt-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Tue, 11 Jul 2017 07:01:32 PDT (-0700), james.hogan@imgtec.com wrote:
> Hi Christoph,
>
> On Tue, Jul 11, 2017 at 06:39:48AM -0700, Christoph Hellwig wrote:
>> > +#ifdef CONFIG_64BIT
>> > +SYSCALL_DEFINE6(mmap, unsigned long, addr, unsigned long, len,
>> > + unsigned long, prot, unsigned long, flags,
>> > + unsigned long, fd, off_t, offset)
>> > +{
>> > + if (unlikely(offset & (~PAGE_MASK)))
>> > + return -EINVAL;
>> > + return sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
>> > +}
>> > +#else
>> > +SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, len,
>> > + unsigned long, prot, unsigned long, flags,
>> > + unsigned long, fd, off_t, offset)
>> > +{
>> > + /*
>> > + * Note that the shift for mmap2 is constant (12),
>> > + * regardless of PAGE_SIZE
>> > + */
>> > + if (unlikely(offset & (~PAGE_MASK >> 12)))
>> > + return -EINVAL;
>> > + return sys_mmap_pgoff(addr, len, prot, flags, fd,
>> > + offset >> (PAGE_SHIFT - 12));
>> > +}
>> > +#endif /* !CONFIG_64BIT */
>>
>> Most modern ports seem to expose sys_mmap_pgoff as the
>> syscall directly. Any reason you're doing this differently?
>
> I think Palmer's patch is probably correct here. Exposing sys_mmap_pgoff
> is only really correct on 32-bit arches where the only page size is 4k.
> If other page sizes are supported then this is the correct way to handle
> it as the page offset from 32-bit userland is supposed to be in 4k
> units.
>
> 64-bit doesn't need to worry about squeezing big file offsets into the
> off_t offset so don't need to do the shift at all.
>
> See the mmap2 man page. It says "the final argument specifies the offset
> into the file in 4096-byte units", and it points out ia64 as an
> exception where it depends on the page size of the system.
>
>>
>> But even the code for the older ones should probably be consolidated..
>
> Quite probably, yes.
This looks like what arm64 does, though I'm OK either way. Here's my attempt
at consolidating the code, even though there isn't a lot to help with:
diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c
index e18fc0ebdd91..4351be7d0533 100644
--- a/arch/riscv/kernel/sys_riscv.c
+++ b/arch/riscv/kernel/sys_riscv.c
@@ -17,14 +17,23 @@
#include <asm/cmpxchg.h>
#include <asm/unistd.h>
+static long riscv_sys_mmap(unsigned long addr, unsigned long len,
+ unsigned long prot, unsigned long flags,
+ unsigned long fd, off_t offset,
+ unsigned long page_shift_offset)
+{
+ if (unlikely(offset & (~PAGE_MASK >> page_shift_offset)))
+ return -EINVAL;
+ return sys_mmap_pgoff(addr, len, prot, flags, fd,
+ offset >> (PAGE_SHIFT - page_shift_offset));
+}
+
#ifdef CONFIG_64BIT
SYSCALL_DEFINE6(mmap, unsigned long, addr, unsigned long, len,
unsigned long, prot, unsigned long, flags,
unsigned long, fd, off_t, offset)
{
- if (unlikely(offset & (~PAGE_MASK)))
- return -EINVAL;
- return sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
+ return riscv_sys_mmap(addr, len, prot, flags, fd, offset, 0);
}
#else
SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, len,
@@ -35,9 +44,6 @@ SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, len,
* Note that the shift for mmap2 is constant (12),
* regardless of PAGE_SIZE
*/
- if (unlikely(offset & (~PAGE_MASK >> 12)))
- return -EINVAL;
- return sys_mmap_pgoff(addr, len, prot, flags, fd,
- offset >> (PAGE_SHIFT - 12));
+ return riscv_sys_mmap(addr, len, prot, flags, fd, offset, 12);
}
#endif /* !CONFIG_64BIT */
I'll submit this as part of our v6, which will hopefully be coming out soon.
Thanks!
Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread
RISC-V Linux Port v5 Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-11 04:00 +0200
[PATCH 17/17] RISC-V: Build Infastructure Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-11 04:00 +0200
Re: [PATCH 17/17] RISC-V: Build Infastructure Michael Ellerman <mpe@ellerman.id.au> - 2017-07-11 08:40 +0200
Re: [PATCH 17/17] RISC-V: Build Infastructure Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-11 18:30 +0200
Re: [PATCH 17/17] RISC-V: Build Infastructure Michael Ellerman <mpe@ellerman.id.au> - 2017-07-12 12:50 +0200
[PATCH 06/17] irqchip: RISC-V Local Interrupt Controller Driver Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-11 04:00 +0200
[PATCH 07/17] irqchip: New RISC-V PLIC Driver Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-11 04:00 +0200
[PATCH 02/17] pci: Add a generic, weakly-linked pcibios_align_resource Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-11 04:00 +0200
[PATCH 08/17] tty: New RISC-V SBI console driver Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-11 04:00 +0200
Re: [PATCH 08/17] tty: New RISC-V SBI console driver Michael Ellerman <mpe@ellerman.id.au> - 2017-07-11 08:30 +0200
Re: [PATCH 08/17] tty: New RISC-V SBI console driver Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-11 18:30 +0200
Re: [PATCH 08/17] tty: New RISC-V SBI console driver Michael Ellerman <mpe@ellerman.id.au> - 2017-07-12 13:10 +0200
Re: [PATCH 08/17] tty: New RISC-V SBI console driver Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-12 18:30 +0200
Re: [PATCH 08/17] tty: New RISC-V SBI console driver Michael Ellerman <mpe@ellerman.id.au> - 2017-07-13 14:10 +0200
Re: [PATCH 08/17] tty: New RISC-V SBI console driver James Hogan <james.hogan@imgtec.com> - 2017-07-13 14:40 +0200
Re: [PATCH 08/17] tty: New RISC-V SBI console driver Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-14 00:00 +0200
Re: [PATCH 08/17] tty: New RISC-V SBI console driver Michael Ellerman <mpe@ellerman.id.au> - 2017-07-14 07:10 +0200
[PATCH 12/17] RISC-V: ELF and module implementation Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-11 04:00 +0200
[PATCH 15/17] RISC-V: Paging and MMU Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-11 04:00 +0200
[PATCH 04/17] MAINTAINERS: Add RISC-V Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-11 04:00 +0200
[PATCH 05/17] clocksource: New RISC-V SBI timer driver Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-11 04:00 +0200
[PATCH 03/17] pci: Add a generic, weakly-linked pcibios_fixup_bus Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-11 04:00 +0200
Re: [PATCH 03/17] pci: Add a generic, weakly-linked pcibios_fixup_bus "Luis R. Rodriguez" <mcgrof@kernel.org> - 2017-07-11 21:00 +0200
[PATCH 01/17] lib: Add shared copies of some GCC library routines Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-11 04:00 +0200
Re: [PATCH 01/17] lib: Add shared copies of some GCC library routines Randy Dunlap <rdunlap@infradead.org> - 2017-07-11 04:10 +0200
Re: [PATCH 01/17] lib: Add shared copies of some GCC library routines Stephen Rothwell <sfr@canb.auug.org.au> - 2017-07-11 04:10 +0200
[PATCH 14/17] RISC-V: Device, timer, IRQs, and the SBI Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-11 04:00 +0200
Re: [PATCH 16/17] RISC-V: User-facing API Christoph Hellwig <hch@infradead.org> - 2017-07-11 15:50 +0200
Re: [PATCH 16/17] RISC-V: User-facing API James Hogan <james.hogan@imgtec.com> - 2017-07-11 16:10 +0200
Re: [patches] Re: [PATCH 16/17] RISC-V: User-facing API Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-11 19:30 +0200
Re: RISC-V Linux Port v5 "Luis R. Rodriguez" <mcgrof@kernel.org> - 2017-07-11 20:40 +0200
Re: RISC-V Linux Port v5 Palmer Dabbelt <palmer@dabbelt.com> - 2017-07-11 22:00 +0200
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