Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]


Groups > linux.kernel > #1629585

Re: [PATCH] arm64: prefetch: Change assembly to be compatible with gcc and clang

From Will Deacon <will.deacon@arm.com>
Newsgroups linux.kernel
Subject Re: [PATCH] arm64: prefetch: Change assembly to be compatible with gcc and clang
Date 2017-04-24 15:40 +0200
Message-ID <tzMnF-7Bg-51@gated-at.bofh.it> (permalink)
References <ty5kJ-8td-15@gated-at.bofh.it> <tyfWP-6GX-29@gated-at.bofh.it>
Organization linux.* mail to news gateway

Show all headers | View raw


On Thu, Apr 20, 2017 at 09:42:07AM +0100, Mark Rutland wrote:
> On Wed, Apr 19, 2017 at 02:22:11PM -0700, Matthias Kaehlcke wrote:
> > clang fails to build with the current code:
> > 
> > arch/arm64/include/asm/processor.h:172:15: error: invalid operand in
> > inline asm: 'prfm pldl1keep, ${0:a}'
> > 
> > Apparently clang does not support the 'a' modifier. Change the
> > constraint from 'p' ('An operand that is a valid memory address is
> > allowed') to 'Q' ('A memory address which uses a single base register
> > with no offset'), which works for both gcc and clang.
> 
> It looks like the current %a0 template and p constraint were inherited
> from arch/arm, as they've been there from day one on arm64.
> 
> Looking at the arch/arm history, the "a" operand modifier and "p"
> constraint were introduced in commit:
> 
>   16f719de62809e22 ("[ARM] 5196/1: fix inline asm constraints for preload")
> 
> ... so as to avoid GCC assuming prefetch of a pointer implied it was not
> NULL. Until that point, we'd used no operand modifier and "o"
> constraint.
> 
> It's not clear to me whether "o", "p", and "Q" constraints differ in
> this regard on AArch64, or if the issue regarding NULL is still
> relevant. The GCC docs say the "p" constraint is used for "a valid
> memory address", which does sound like it shouldn't be NULL.
> 
> Otherwise, this does look consistent with what we do elsewhere.

I really don't like using 'Q' here, for two reasons:

1. It means we likely allocate a register where we don't need to, because
   we're going to need to use [Xn] as the addressing mode, which means
   adding any immediate offsets.

2. As you mention, 16f719de62809e22 says that GCC will use this as an
   indication that the address is non-NULL.

We also can't just remove the 'a', because that will result in assembly
failures. I haven't dug into exactly why, but I suspect it's because "p"
can generate a label, which then won't assemble if surrounded by '[]'.

Will

Back to linux.kernel | Previous | NextPrevious in thread | Next in thread | Find similar | Unroll thread


Thread

[PATCH] arm64: prefetch: Change assembly to be compatible with gcc and clang Matthias Kaehlcke <mka@chromium.org> - 2017-04-19 23:30 +0200
  Re: [PATCH] arm64: prefetch: Change assembly to be compatible with  gcc and clang Mark Rutland <mark.rutland@arm.com> - 2017-04-20 10:50 +0200
    Re: [PATCH] arm64: prefetch: Change assembly to be compatible with  gcc and clang Will Deacon <will.deacon@arm.com> - 2017-04-24 15:40 +0200
      Re: [PATCH] arm64: prefetch: Change assembly to be compatible with  gcc and clang Matthias Kaehlcke <mka@chromium.org> - 2017-04-27 22:40 +0200

csiph-web