Re: [PATCH v5 01/32] x86: Documentation for AMD Secure Memory Encryption (SME)

From	Borislav Petkov <bp@alien8.de>
Newsgroups	linux.kernel
Subject	Re: [PATCH v5 01/32] x86: Documentation for AMD Secure Memory Encryption (SME)
Date	2017-04-19 17:40 +0200
Message-ID	<txZS2-59Y-27@gated-at.bofh.it> (permalink)
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On Wed, Apr 19, 2017 at 09:23:47AM -0500, Tom Lendacky wrote:
> Btw, I tried to update all the subjects and descriptions to be
> more descriptive but I'm sure there is still room for improvement
> so keep the comments on them coming.

No worries there :)

> Note, just because the bit is set in %cr3 doesn't mean the full
> hierarchy is encrypted. Each level in the hierarchy needs to have the
> encryption bit set. So, theoretically, you could have the encryption
> bit set in %cr3 so that the PGD is encrypted, but not set the encryption
> bit in the PGD entry for a PUD and so the PUD pointed to by that entry
> would not be encrypted.

Ha, that is a nice detail I didn't realize. You could add it to the text.

Thanks.

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

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Re: [PATCH v5 01/32] x86: Documentation for AMD Secure Memory  Encryption (SME) Borislav Petkov <bp@alien8.de> - 2017-04-19 11:10 +0200
  Re: [PATCH v5 01/32] x86: Documentation for AMD Secure Memory Encryption (SME) David Howells <dhowells@redhat.com> - 2017-04-19 12:00 +0200
  Re: [PATCH v5 01/32] x86: Documentation for AMD Secure Memory  Encryption (SME) Borislav Petkov <bp@alien8.de> - 2017-04-19 17:40 +0200

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