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Groups > linux.kernel > #1624527
| From | Madhavan Srinivasan <maddy@linux.vnet.ibm.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v3 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src |
| Date | 2017-04-17 05:50 +0200 |
| Message-ID | <tx5PP-43y-3@gated-at.bofh.it> (permalink) |
| References | <tuTg5-rs-5@gated-at.bofh.it> <tuTg5-rs-13@gated-at.bofh.it> <tvMcy-30k-19@gated-at.bofh.it> <tvMYV-3yB-7@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Thursday 13 April 2017 06:53 PM, Michael Ellerman wrote: > Peter Zijlstra <peterz@infradead.org> writes: > >> On Tue, Apr 11, 2017 at 07:21:05AM +0530, Madhavan Srinivasan wrote: >>> From: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> >>> >>> perf_mem_data_src is an union that is initialized via the ->val field >>> and accessed via the bitmap fields. For this to work on big endian >>> platforms (Which is broken now), we also need a big-endian represenation >>> of perf_mem_data_src. i.e, in a big endian system, if user request >>> PERF_SAMPLE_DATA_SRC (perf report -d), will get the default value from >>> perf_sample_data_init(), which is PERF_MEM_NA. Value for PERF_MEM_NA >>> is constructed using shifts: >>> >>> /* TLB access */ >>> #define PERF_MEM_TLB_NA 0x01 /* not available */ >>> ... >>> #define PERF_MEM_TLB_SHIFT 26 >>> >>> #define PERF_MEM_S(a, s) \ >>> (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT) >>> >>> #define PERF_MEM_NA (PERF_MEM_S(OP, NA) |\ >>> PERF_MEM_S(LVL, NA) |\ >>> PERF_MEM_S(SNOOP, NA) |\ >>> PERF_MEM_S(LOCK, NA) |\ >>> PERF_MEM_S(TLB, NA)) >>> >>> Which works out as: >>> >>> ((0x01 << 0) | (0x01 << 5) | (0x01 << 19) | (0x01 << 24) | (0x01 << 26)) >>> >>> Which means the PERF_MEM_NA value comes out of the kernel as 0x5080021 >>> in CPU endian. >>> >>> But then in the perf tool, the code uses the bitfields to inspect the >>> value, and currently the bitfields are defined using little endian >>> ordering. >>> >>> So eg. in perf_mem__tlb_scnprintf() we see: >>> data_src->val = 0x5080021 >>> op = 0x0 >>> lvl = 0x0 >>> snoop = 0x0 >>> lock = 0x0 >>> dtlb = 0x0 >>> rsvd = 0x5080021 >>> >>> Patch does a minimal fix of adding big endian definition of the bitfields >>> to match the values that are already exported by the kernel on big endian. >>> And it makes no change on little endian. >> I think it is important to note that there are no current big-endian >> users. So 'fixing' this will not break anybody and will ensure future >> users (next patch) will work correctly. > Sure I'll fold in something along those lines. Thanks mpe. Maddy > >> Aside from that amendment, >> >> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> > Thanks. > > cheers >
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[PATCH v3 0/6] powerpc/perf: Export memory hierarchy level Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-04-11 04:00 +0200
[PATCH v3 4/6] powerpc/perf: Support to export SIERs bit in Power8 Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-04-11 04:00 +0200
[PATCH v3 5/6] powerpc/perf: Support to export SIERs bit in Power9 Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-04-11 04:00 +0200
[PATCH v3 6/6] powerpc/perf: Add Power8 mem_access event to sysfs Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-04-11 04:00 +0200
[PATCH v3 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-04-11 04:00 +0200
Re: [PATCH v3 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Peter Zijlstra <peterz@infradead.org> - 2017-04-13 14:40 +0200
Re: [PATCH v3 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Michael Ellerman <mpe@ellerman.id.au> - 2017-04-13 15:30 +0200
Re: [PATCH v3 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-04-17 05:50 +0200
Re: [PATCH v3 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-04-17 05:50 +0200
Re: [PATCH v3 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Michael Ellerman <mpe@ellerman.id.au> - 2017-04-19 07:00 +0200
Re: [PATCH v3 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-04-19 16:50 +0200
Re: [PATCH v3 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Michael Ellerman <mpe@ellerman.id.au> - 2017-04-20 00:20 +0200
Re: [v3, 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Michael Ellerman <patch-notifications@ellerman.id.au> - 2017-04-20 00:10 +0200
[PATCH v3 3/6] powerpc/perf: Support to export MMCRA[TEC*] field to userspace Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-04-11 04:00 +0200
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