[PATCH 2/2] spi: atmel: add deepest PM support to SAMA5D2

From	Quentin Schulz <quentin.schulz@free-electrons.com>
Newsgroups	linux.kernel
Subject	[PATCH 2/2] spi: atmel: add deepest PM support to SAMA5D2
Date	2017-04-14 10:30 +0200
Message-ID	<tw4M9-7dE-9@gated-at.bofh.it> (permalink)
References	<tw4M9-7dE-3@gated-at.bofh.it>
Organization	linux.* mail to news gateway

Show all headers | View raw

This adds deepest (Backup+Self-Refresh) PM support to the ATMEL SAMA5D2
SoC's SPI controller.

When resuming from deepest state, it is required to restore MR register
as the registers are lost since VDD core has been shut down when
entering deepest state on the SAMA5D2.

Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
---

v2:
  - fix commit log explanation on why restoring the registers is required
  after resuming from deepest state,

 drivers/spi/spi-atmel.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
index 247d920..1eb83c9 100644
--- a/drivers/spi/spi-atmel.c
+++ b/drivers/spi/spi-atmel.c
@@ -1702,8 +1702,17 @@ static int atmel_spi_suspend(struct device *dev)
 static int atmel_spi_resume(struct device *dev)
 {
 	struct spi_master *master = dev_get_drvdata(dev);
+	struct atmel_spi *as = spi_master_get_devdata(master);
 	int ret;
 
+	ret = clk_prepare_enable(as->clk);
+	if (ret)
+		return ret;
+
+	atmel_spi_init(as);
+
+	clk_disable_unprepare(as->clk);
+
 	if (!pm_runtime_suspended(dev)) {
 		ret = atmel_spi_runtime_resume(dev);
 		if (ret)
-- 
2.9.3

Back to linux.kernel | Previous | Next — Next in thread | Find similar | Unroll thread

Thread

[PATCH 2/2] spi: atmel: add deepest PM support to SAMA5D2 Quentin Schulz <quentin.schulz@free-electrons.com> - 2017-04-14 10:30 +0200
  Re: [PATCH 2/2] spi: atmel: add deepest PM support to SAMA5D2 Alexandre Belloni <alexandre.belloni@free-electrons.com> - 2017-04-14 12:40 +0200
    RE: [PATCH 2/2] spi: atmel: add deepest PM support to SAMA5D2 <Nicolas.Ferre@microchip.com> - 2017-04-18 11:00 +0200

csiph-web