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Re: [PATCH 4/6] kvm: nVMX: support EPT accessed/dirty bits

From Bandan Das <bsd@redhat.com>
Newsgroups linux.kernel
Subject Re: [PATCH 4/6] kvm: nVMX: support EPT accessed/dirty bits
Date 2017-04-13 01:10 +0200
Message-ID <tvzyF-2Mb-9@gated-at.bofh.it> (permalink)
References <tqF21-4or-3@gated-at.bofh.it> <tqF22-4or-25@gated-at.bofh.it> <tvdya-5fl-3@gated-at.bofh.it> <tvdRw-5mf-9@gated-at.bofh.it>
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Paolo Bonzini <pbonzini@redhat.com> writes:

> ----- Original Message -----
>> From: "Bandan Das" <bsd@redhat.com>
>> To: "Paolo Bonzini" <pbonzini@redhat.com>
>> Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, david@redhat.com
>> Sent: Wednesday, April 12, 2017 7:35:16 AM
>> Subject: Re: [PATCH 4/6] kvm: nVMX: support EPT accessed/dirty bits
>> 
>> Paolo Bonzini <pbonzini@redhat.com> writes:
>> ...
>> >  	accessed_dirty = have_ad ? PT_GUEST_ACCESSED_MASK : 0;
>> > +
>> > +	/*
>> > +	 * FIXME: on Intel processors, loads of the PDPTE registers for PAE
>> > paging
>> > +	 * by the MOV to CR instruction are treated as reads and do not cause the
>> > +	 * processor to set the dirty flag in tany EPT paging-structure entry.
>> > +	 */
>> 
>> Minor typo: "in any EPT paging-structure entry".
>> 
>> > +	nested_access = (have_ad ? PFERR_WRITE_MASK : 0) | PFERR_USER_MASK;
>> > +
>> >  	pt_access = pte_access = ACC_ALL;
>> >  	++walker->level;
>> >  
>> > @@ -338,7 +337,7 @@ static int FNAME(walk_addr_generic)(struct guest_walker
>> > *walker,
>> >  		walker->pte_gpa[walker->level - 1] = pte_gpa;
>> >  
>> >  		real_gfn = mmu->translate_gpa(vcpu, gfn_to_gpa(table_gfn),
>> > -					      PFERR_USER_MASK|PFERR_WRITE_MASK,
>> > +					      nested_access,
>> >  					      &walker->fault);
>> 
>> I can't seem to understand the significance of this change (or for that
>> matter what was before this change).
>> 
>> mmu->translate_gpa() just returns gfn_to_gpa(table_gfn), right ?
>
> For EPT it is, you're right it's fishy.  The "nested_access" should be
> computed in translate_nested_gpa, which is where kvm->arch.nested_mmu
> (non-EPT) requests to access kvm->arch.mmu (EPT).

Thanks for the clarification. Is it the case when L1 runs L2 without
EPT ? I can't figure out the case where translate_nested_gpa will actually
be called. FNAME(walk_addr_nested) calls walk_addr_generic
with &vcpu->arch.nested_mmu and init_kvm_nested_mmu() sets gva_to_gpa()
with the appropriate "_nested" functions. But the gva_to_gpa() pointers
don't seem to get invoked at all for the nested case.

BTW, just noticed that setting PFERR_USER_MASK is redundant since
translate_nested_gpa does it too.

Bandan

> In practice we need to define a new function
> vcpu->arch.mmu.gva_to_gpa_nested that computes the nested_access
> and calls cpu->arch.mmu.gva_to_gpa.
>
> Thanks,
>
> Paolo

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Thread

Re: [PATCH 4/6] kvm: nVMX: support EPT accessed/dirty bits Bandan Das <bsd@redhat.com> - 2017-04-12 01:40 +0200
  Re: [PATCH 4/6] kvm: nVMX: support EPT accessed/dirty bits Paolo Bonzini <pbonzini@redhat.com> - 2017-04-12 02:00 +0200
    Re: [PATCH 4/6] kvm: nVMX: support EPT accessed/dirty bits Bandan Das <bsd@redhat.com> - 2017-04-13 01:10 +0200
      Re: [PATCH 4/6] kvm: nVMX: support EPT accessed/dirty bits Paolo Bonzini <pbonzini@redhat.com> - 2017-04-14 07:20 +0200

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