[PATCHv4 0/9] x86: 5-level paging enabling for v4.12, Part 4

From	"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Newsgroups	linux.kernel
Subject	[PATCHv4 0/9] x86: 5-level paging enabling for v4.12, Part 4
Date	2017-04-13 13:40 +0200
Message-ID	<tvLgt-2jU-3@gated-at.bofh.it> (permalink)
References	<ttEj8-G4-25@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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Here's updated version the fourth and the last bunch of of patches that brings
initial 5-level paging enabling.

Please review and consider applying.

The situation with assembly hasn't changed much. I still not see a way to get
it work.

In this version I've included patch to fix comment in return_from_SYSCALL_64,
fixed bug in coverting startup_64 to C and updated the patch which allows to
opt-in full address space.

Kirill A. Shutemov (9):
  x86/asm: Fix comment in return_from_SYSCALL_64
  x86/boot/64: Rewrite startup_64 in C
  x86/boot/64: Rename init_level4_pgt and early_level4_pgt
  x86/boot/64: Add support of additional page table level during early
    boot
  x86/mm: Add sync_global_pgds() for configuration with 5-level paging
  x86/mm: Make kernel_physical_mapping_init() support 5-level paging
  x86/mm: Add support for 5-level paging for KASLR
  x86: Enable 5-level paging support
  x86/mm: Allow to have userspace mappings above 47-bits

 arch/x86/Kconfig                            |   5 +
 arch/x86/boot/compressed/head_64.S          |  23 ++++-
 arch/x86/entry/entry_64.S                   |   3 +-
 arch/x86/include/asm/elf.h                  |   4 +-
 arch/x86/include/asm/mpx.h                  |   9 ++
 arch/x86/include/asm/pgtable.h              |   2 +-
 arch/x86/include/asm/pgtable_64.h           |   6 +-
 arch/x86/include/asm/processor.h            |  11 ++-
 arch/x86/include/uapi/asm/processor-flags.h |   2 +
 arch/x86/kernel/espfix_64.c                 |   2 +-
 arch/x86/kernel/head64.c                    | 137 +++++++++++++++++++++++++---
 arch/x86/kernel/head_64.S                   | 134 +++++++--------------------
 arch/x86/kernel/machine_kexec_64.c          |   2 +-
 arch/x86/kernel/sys_x86_64.c                |  30 +++++-
 arch/x86/mm/dump_pagetables.c               |   2 +-
 arch/x86/mm/hugetlbpage.c                   |  27 +++++-
 arch/x86/mm/init_64.c                       | 104 +++++++++++++++++++--
 arch/x86/mm/kasan_init_64.c                 |  12 +--
 arch/x86/mm/kaslr.c                         |  81 ++++++++++++----
 arch/x86/mm/mmap.c                          |   6 +-
 arch/x86/mm/mpx.c                           |  33 ++++++-
 arch/x86/realmode/init.c                    |   2 +-
 arch/x86/xen/Kconfig                        |   1 +
 arch/x86/xen/mmu.c                          |  18 ++--
 arch/x86/xen/xen-pvh.S                      |   2 +-
 25 files changed, 470 insertions(+), 188 deletions(-)

-- 
2.11.0

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[PATCHv4 0/9] x86: 5-level paging enabling for v4.12, Part 4 "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-04-13 13:40 +0200
  [PATCHv4 9/9] x86/mm: Allow to have userspace mappings above 47-bits "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-04-13 13:40 +0200
  [PATCHv4 2/9] x86/boot/64: Rewrite startup_64 in C "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-04-13 13:40 +0200
  [PATCHv4 1/9] x86/asm: Fix comment in return_from_SYSCALL_64 "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-04-13 13:40 +0200
  [PATCHv4 3/9] x86/boot/64: Rename init_level4_pgt and early_level4_pgt "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-04-13 13:40 +0200
  [PATCHv4 6/9] x86/mm: Make kernel_physical_mapping_init() support 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-04-13 13:40 +0200
  [PATCHv4 5/9] x86/mm: Add sync_global_pgds() for configuration with 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-04-13 13:40 +0200

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