Re: [PATCH 2/3 v2] pinctrl: Add pincontrol driver for ARTPEC-6 SoC

From	Linus Walleij <linus.walleij@linaro.org>
Newsgroups	linux.kernel
Subject	Re: [PATCH 2/3 v2] pinctrl: Add pincontrol driver for ARTPEC-6 SoC
Date	2017-04-07 12:00 +0200
Message-ID	<ttyQq-5pF-15@gated-at.bofh.it> (permalink)
References	<tqGAN-5EJ-7@gated-at.bofh.it> <tqH3P-65b-5@gated-at.bofh.it> <ts9AJ-6V6-1@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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On Mon, Apr 3, 2017 at 2:47 PM, Jesper Nilsson <jesper.nilsson@axis.com> wrote:

> Add pinctrl driver support for the Axis ARTPEC-6 SoC.
> There are only some pins that actually have different
> functions available, but all can control bias (pull-up/-down)
> and drive strength.
> Code originally written by Chris Paterson.
>
> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
> ---
> Changes since v1:
> - Get rid of the artpec-6 pinctrl header
> - Replace the register arrays with a function that maps
>   from pin number to the register offset.
> - Cleanup duplicate information in artpec6_pin_groups array

Nice, patch applied for v4.12.

Yours,
Linus Walleij

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Re: [PATCH 2/3] pinctrl: Add pincontrol driver for ARTPEC-6 SoC Linus Walleij <linus.walleij@linaro.org> - 2017-03-30 14:10 +0200
  Re: [PATCH 2/3] pinctrl: Add pincontrol driver for ARTPEC-6 SoC Jesper Nilsson <jesper.nilsson@axis.com> - 2017-03-30 16:30 +0200
  [PATCH 2/3 v2] pinctrl: Add pincontrol driver for ARTPEC-6 SoC Jesper Nilsson <jesper.nilsson@axis.com> - 2017-04-03 14:50 +0200
    Re: [PATCH 2/3 v2] pinctrl: Add pincontrol driver for ARTPEC-6 SoC Linus Walleij <linus.walleij@linaro.org> - 2017-04-07 12:00 +0200

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