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Groups > linux.kernel > #1618436
| From | "Wei.Xu" <xuwei5@hisilicon.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 1/5] arm64: dts: hisi: add mbigen nodes for the hip07 SoC |
| Date | 2017-04-07 03:40 +0200 |
| Message-ID | <ttr2x-oT-5@gated-at.bofh.it> (permalink) |
| References | <ttr2x-oT-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
From: Wei Xu <xuwei5@hisilicon.com>
Add mbigen nodes for the hip07 SoC those will be used
for the SAS, XGE and PCIe host controllers.
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hip07.dtsi | 61 ++++++++++++++++++++++++++++++++
1 file changed, 61 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
index 5144eb1..6077def 100644
--- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -1014,6 +1014,34 @@
compatible = "hisilicon,mbigen-v2";
reg = <0x0 0xa0080000 0x0 0x10000>;
+ mbigen_pcie2_a: intc_pcie2_a {
+ msi-parent = <&p0_its_dsa_a 0x40087>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ num-pins = <10>;
+ };
+
+ mbigen_sas1: intc_sas1 {
+ msi-parent = <&p0_its_dsa_a 0x40000>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ num-pins = <128>;
+ };
+
+ mbigen_sas2: intc_sas2 {
+ msi-parent = <&p0_its_dsa_a 0x40040>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ num-pins = <128>;
+ };
+
+ mbigen_smmu_pcie: intc_smmu_pcie {
+ msi-parent = <&p0_its_dsa_a 0x40b0c>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ num-pins = <3>;
+ };
+
mbigen_usb: intc_usb {
msi-parent = <&p0_its_dsa_a 0x40080>;
interrupt-controller;
@@ -1022,6 +1050,39 @@
};
};
+ p0_mbigen_dsa_a: interrupt-controller@c0080000 {
+ compatible = "hisilicon,mbigen-v2";
+ reg = <0x0 0xc0080000 0x0 0x10000>;
+
+ mbigen_dsaf0: intc_dsaf0 {
+ msi-parent = <&p0_its_dsa_a 0x40800>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ num-pins = <409>;
+ };
+
+ mbigen_dsa_roce: intc-roce {
+ msi-parent = <&p0_its_dsa_a 0x40B1E>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ num-pins = <34>;
+ };
+
+ mbigen_sas0: intc-sas0 {
+ msi-parent = <&p0_its_dsa_a 0x40900>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ num-pins = <128>;
+ };
+
+ mbigen_smmu_dsa: intc_smmu_dsa {
+ msi-parent = <&p0_its_dsa_a 0x40b20>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ num-pins = <3>;
+ };
+ };
+
soc {
compatible = "simple-bus";
#address-cells = <2>;
--
1.9.1
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[PATCH 1/5] arm64: dts: hisi: add mbigen nodes for the hip07 SoC "Wei.Xu" <xuwei5@hisilicon.com> - 2017-04-07 03:40 +0200
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