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Groups > linux.kernel > #1618098
| From | Juergen Gross <jgross@suse.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 7/8] x86: Enable 5-level paging support |
| Date | 2017-04-06 17:00 +0200 |
| Message-ID | <tth3c-1Ia-21@gated-at.bofh.it> (permalink) |
| References | <ttggN-16l-3@gated-at.bofh.it> <ttggO-16l-37@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On 06/04/17 16:01, Kirill A. Shutemov wrote: > Most of things are in place and we can enable support of 5-level paging. > > Enabling XEN with 5-level paging requires more work. The patch makes XEN > dependent on !X86_5LEVEL. > > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> > --- > arch/x86/Kconfig | 5 +++++ > arch/x86/xen/Kconfig | 1 + > 2 files changed, 6 insertions(+) > > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig > index 4e153e93273f..7a76dcac357e 100644 > --- a/arch/x86/Kconfig > +++ b/arch/x86/Kconfig > @@ -318,6 +318,7 @@ config FIX_EARLYCON_MEM > > config PGTABLE_LEVELS > int > + default 5 if X86_5LEVEL > default 4 if X86_64 > default 3 if X86_PAE > default 2 > @@ -1390,6 +1391,10 @@ config X86_PAE > has the cost of more pagetable lookup overhead, and also > consumes more pagetable space per process. > > +config X86_5LEVEL > + bool "Enable 5-level page tables support" > + depends on X86_64 > + > config ARCH_PHYS_ADDR_T_64BIT > def_bool y > depends on X86_64 || X86_PAE > diff --git a/arch/x86/xen/Kconfig b/arch/x86/xen/Kconfig > index 76b6dbd627df..b90d481ce5a1 100644 > --- a/arch/x86/xen/Kconfig > +++ b/arch/x86/xen/Kconfig > @@ -5,6 +5,7 @@ > config XEN > bool "Xen guest support" > depends on PARAVIRT > + depends on !X86_5LEVEL > select PARAVIRT_CLOCK > select XEN_HAVE_PVMMU > select XEN_HAVE_VPMU > Just a heads up: this last change will conflict with the Xen tree. Can't we just ignore the additional level in Xen pv mode and run with 4 levels instead? Juergen
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[PATCH 0/8] x86: 5-level paging enabling for v4.12, Part 4 "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-04-06 16:10 +0200
[PATCH 5/8] x86/mm: Make kernel_physical_mapping_init() support 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-04-06 16:10 +0200
[PATCH 7/8] x86: Enable 5-level paging support "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-04-06 16:10 +0200
Re: [PATCH 7/8] x86: Enable 5-level paging support Juergen Gross <jgross@suse.com> - 2017-04-06 17:00 +0200
Re: [PATCH 7/8] x86: Enable 5-level paging support "Kirill A. Shutemov" <kirill@shutemov.name> - 2017-04-06 17:30 +0200
Re: [PATCH 7/8] x86: Enable 5-level paging support Juergen Gross <jgross@suse.com> - 2017-04-06 18:00 +0200
[PATCH 2/8] x86/boot/64: Rename init_level4_pgt and early_level4_pgt "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-04-06 16:10 +0200
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