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[PATCH v4 5/5] arm64: allwinner: a64: add R_PIO pinctrl node

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From: Icenowy Zheng <icenowy@aosc.xyz>

Allwinner A64 have a dedicated pin controller to manage the PL pin bank.
As the driver and the required clock support are added, add the device
node for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 1d4e5bcced0c..6bc606b4d74d 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -409,5 +409,17 @@
 			#clock-cells = <1>;
 			#reset-cells = <1>;
 		};
+
+		r_pio: pinctrl@01f02c00 {
+			compatible = "allwinner,sun50i-a64-r-pinctrl";
+			reg = <0x01f02c00 0x400>;
+			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&r_ccu 3>, <&osc24M>, <&osc32k>;
+			clock-names = "apb", "hosc", "losc";
+			gpio-controller;
+			#gpio-cells = <3>;
+			interrupt-controller;
+			#interrupt-cells = <3>;
+		};
 	};
 };
-- 
2.12.2

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[PATCH v4 0/5] Add support for the R_CCU on Allwinner H3/A64 SoCs Icenowy Zheng <icenowy@aosc.io> - 2017-04-04 12:00 +0200
  [PATCH v4 1/5] dt-bindings: update device tree binding for Allwinner PRCM CCUs Icenowy Zheng <icenowy@aosc.io> - 2017-04-04 12:00 +0200
  [PATCH v4 2/5] clk: sunxi-ng: add support for PRCM CCUs Icenowy Zheng <icenowy@aosc.io> - 2017-04-04 12:00 +0200
  [PATCH v4 3/5] arm64: allwinner: a64: add r_ccu node Icenowy Zheng <icenowy@aosc.io> - 2017-04-04 12:20 +0200
  [PATCH v4 4/5] ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu Icenowy Zheng <icenowy@aosc.io> - 2017-04-04 12:40 +0200
  [PATCH v4 5/5] arm64: allwinner: a64: add R_PIO pinctrl node Icenowy Zheng <icenowy@aosc.io> - 2017-04-04 12:50 +0200
  Re: [PATCH v4 0/5] Add support for the R_CCU on Allwinner H3/A64 SoCs Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-04-04 17:50 +0200

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