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Re: [PATCH v2 1/2] dt-bindings: Document the STM32 QSPI bindings

From Ludovic BARRE <ludovic.barre@st.com>
Newsgroups linux.kernel
Subject Re: [PATCH v2 1/2] dt-bindings: Document the STM32 QSPI bindings
Date 2017-04-05 18:10 +0200
Message-ID <tsVFp-4Pz-51@gated-at.bofh.it> (permalink)
References <tr8dI-7tj-5@gated-at.bofh.it> <tr8dJ-7tj-29@gated-at.bofh.it> <tsduG-YG-3@gated-at.bofh.it> <tsr4B-1Jj-5@gated-at.bofh.it> <tsvKW-4O6-41@gated-at.bofh.it>
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On 04/04/2017 02:20 PM, Rob Herring wrote:
> On Tue, Apr 4, 2017 at 2:28 AM, Ludovic BARRE <ludovic.barre@st.com> wrote:
>> Hi Rob
>>
>> thanks for review
>> my comments below
>>
>> br
>> Ludo
>>
>> On 04/03/2017 06:57 PM, Rob Herring wrote:
>>> On Fri, Mar 31, 2017 at 07:02:03PM +0200, Ludovic Barre wrote:
>>>> From: Ludovic Barre <ludovic.barre@st.com>
>>>>
>>>> This patch adds documentation of device tree bindings for the STM32
>>>> QSPI controller.
>>>>
>>>> Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
>>>> ---
>>>>    .../devicetree/bindings/mtd/stm32-quadspi.txt      | 45
>>>> ++++++++++++++++++++++
>>>>    1 file changed, 45 insertions(+)
>>>>    create mode 100644
>>>> Documentation/devicetree/bindings/mtd/stm32-quadspi.txt
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/mtd/stm32-quadspi.txt
>>>> b/Documentation/devicetree/bindings/mtd/stm32-quadspi.txt
>>>> new file mode 100644
>>>> index 0000000..95a8ebd
>>>> --- /dev/null
>>>> +++ b/Documentation/devicetree/bindings/mtd/stm32-quadspi.txt
>>>> @@ -0,0 +1,45 @@
>>>> +* STMicroelectronics Quad Serial Peripheral Interface(QuadSPI)
>>>> +
>>>> +Required properties:
>>>> +- compatible: should be "st,stm32f469-qspi"
>>>> +- reg: contains the register location and length.
>>>> +  (optional) the memory mapping address and length
>>> Why optional? Either the h/w has it or doesn't. If some chips don't,
>>> they should have a different compatible string.
>> in fact, the stm32 qspi controller can operate in any of the following
>> modes:
>> -indirect mode: all the operations are performed using the qspi registers
>> with read/write.
>> -read memory-mapped mode: the external Flash memory is mapped to the
>>   microcontroller address space and is seen by the system as if it was
>>   an internal memory (use memcpy_fromio). this mode improve read throughput
>>
>> if qspi_mm is defined the qspi controller use read memory-mapped mode
>> else the controller transfers in indirect mode.
> You should always have the memory region defined because that's what
> the h/w has. If you want another property to select the mode, then
> perhaps that's fine. But why? Can't the OS figure out which to use?
> Why would you ever not use memory mapped mode unless the driver
> doesn't yet support it?
ok, I always map the memory region (qspi_mm is now required).
if the nor-flash is more bigger than "qspi memory region", I force to use
the indirect mode.
> Rob

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Thread

[PATCH v2 0/2] mtd: spi-nor: add stm32 qspi driver Ludovic Barre <ludovic.Barre@st.com> - 2017-03-31 19:10 +0200
  [PATCH v2 1/2] dt-bindings: Document the STM32 QSPI bindings Ludovic Barre <ludovic.Barre@st.com> - 2017-03-31 19:10 +0200
    Re: [PATCH v2 1/2] dt-bindings: Document the STM32 QSPI bindings Rob Herring <robh@kernel.org> - 2017-04-03 19:00 +0200
      Re: [PATCH v2 1/2] dt-bindings: Document the STM32 QSPI bindings Ludovic BARRE <ludovic.barre@st.com> - 2017-04-04 09:30 +0200
        Re: [PATCH v2 1/2] dt-bindings: Document the STM32 QSPI bindings Rob Herring <robh@kernel.org> - 2017-04-04 14:30 +0200
          Re: [PATCH v2 1/2] dt-bindings: Document the STM32 QSPI bindings Ludovic BARRE <ludovic.barre@st.com> - 2017-04-05 18:10 +0200

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