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[PATCH 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume

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In some of NVIDIA Tegra's platform, PWM controller is used to
control the PWM controlled regulators. PWM signal is connected to
the VID pin of the regulator where duty cycle of PWM signal decide
the voltage level of the regulator output.

The tristate (high impedance of PWM pin form Tegra) also define
one of the state of PWM regulator which needs to be configure in
suspend state of system.

Add DT binding details to provide the pin configuration state
from PWM and pinctrl DT node in suspend and active state of
the system.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
 .../devicetree/bindings/pwm/nvidia,tegra20-pwm.txt | 43 ++++++++++++++++++++++
 1 file changed, 43 insertions(+)

diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
index b4e7377..145c323 100644
--- a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
@@ -19,6 +19,19 @@ Required properties:
 - reset-names: Must include the following entries:
   - pwm
 
+Optional properties:
+============================
+In some of the interface like PWM based regualator device, it is required
+to configure the pins diffrently in different states, specially in suspend
+state of the system. The configuration of pin is provided via the pinctrl
+DT node as detailed in the pinctrl DT binding document
+	Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
+
+The PWM node will have following optional properties.
+pinctrl-names:	Pin state names. Must be "suspend" and "resume".
+pinctrl-0:	Node handle of the suspend state configuration of pins.
+pinctrl-1:	Node handle of the resume state configuration of pins.
+
 Example:
 
 	pwm: pwm@7000a000 {
@@ -29,3 +42,33 @@ Example:
 		resets = <&tegra_car 17>;
 		reset-names = "pwm";
 	};
+
+
+Example with the pin configuration for suspend and resume:
+=========================================================
+Here Pin PE7 is used as PWM.
+
+#include <dt-bindings/pinctrl/pinctrl-tegra.h>
+
+	pinmux@70000868 {
+		pwm_suspend: pwm_suspend_state {
+                        pe7 {
+                                nvidia,pins = "pe7";
+                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
+			};
+		};
+
+		pwm_resume: pwm_resume_state {
+                        pe7 {
+                                nvidia,pins = "pe7";
+                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
+			};
+		};
+	};
+
+	pwm@7000a000 {
+		/* Mandatory pwm properties */
+		pinctrl-names = "suspend", "resume";
+		pinctrl-0 = <&pwm_suspend>;
+		pinctrl-1 = <&pwm_resume>;
+	};
-- 
2.1.4

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[PATCH 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume Laxman Dewangan <ldewangan@nvidia.com> - 2017-04-05 16:40 +0200
  Re: [PATCH 3/4] pwm: tegra: Add DT binding details to configure pin  in suspends/resume Jon Hunter <jonathanh@nvidia.com> - 2017-04-06 11:10 +0200
    Re: [PATCH 3/4] pwm: tegra: Add DT binding details to configure pin  in suspends/resume Thierry Reding <thierry.reding@gmail.com> - 2017-04-06 15:10 +0200
      Re: [PATCH 3/4] pwm: tegra: Add DT binding details to configure pin  in suspends/resume Laxman Dewangan <ldewangan@nvidia.com> - 2017-04-06 15:50 +0200
        Re: [PATCH 3/4] pwm: tegra: Add DT binding details to configure pin  in suspends/resume Jon Hunter <jonathanh@nvidia.com> - 2017-04-06 16:10 +0200
        Re: [PATCH 3/4] pwm: tegra: Add DT binding details to configure pin  in suspends/resume Linus Walleij <linus.walleij@linaro.org> - 2017-04-07 12:30 +0200

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