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Groups > linux.kernel > #1616524
| From | Fabio Estevam <festevam@gmail.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 2/2] ARM: dts: imx7: add USDHC NAND clock to SDHC instances |
| Date | 2017-04-05 04:20 +0200 |
| Message-ID | <tsIIa-4VI-15@gated-at.bofh.it> (permalink) |
| References | <tqwrL-6Aq-3@gated-at.bofh.it> <tqwrL-6Aq-1@gated-at.bofh.it> <tr2Bk-3PV-23@gated-at.bofh.it> <triG5-61o-1@gated-at.bofh.it> <trRaO-3jk-19@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Sun, Apr 2, 2017 at 2:02 PM, Fabio Estevam <festevam@gmail.com> wrote:
> On Sat, Apr 1, 2017 at 1:15 AM, Stefan Agner <stefan@agner.ch> wrote:
>
>> IMX7D_IPG_ROOT_CLK is currently not a valid clock in upstream... So we
>> would have to add it to the clock driver first.
>>
>> I guess we could/should add it anyway at one point? But probably also as
>> init on, just to make sure Linux does not disable it since it is
>> currently used by several IPs implicitly.
>
> Yes, I made a previous attempt do add IMX7D_IPG_ROOT_CLK and it did
> not work as I did not put it in the init_on clock list.
>
> Will submit a new patch adding it to init_on, thanks.
I thought that adding IMX7D_IPG_ROOT_CLK would do the trick, but the
patch below also causes the kernel to not boot:
--- a/drivers/clk/imx/clk-imx7d.c
+++ b/drivers/clk/imx/clk-imx7d.c
@@ -386,7 +386,7 @@ static int const clks_init_on[] __initconst = {
IMX7D_PLL_SYS_MAIN_480M_CLK, IMX7D_NAND_USDHC_BUS_ROOT_CLK,
IMX7D_DRAM_PHYM_ROOT_CLK, IMX7D_DRAM_ROOT_CLK,
IMX7D_DRAM_PHYM_ALT_ROOT_CLK, IMX7D_DRAM_ALT_ROOT_CLK,
- IMX7D_AHB_CHANNEL_ROOT_CLK,
+ IMX7D_AHB_CHANNEL_ROOT_CLK, IMX7D_IPG_ROOT_CLK,
};
static struct clk_onecell_data clk_data;
@@ -788,7 +788,7 @@ static void __init imx7d_clocks_init(struct
device_node *ccm_node)
clks[IMX7D_WRCLK_ROOT_DIV] =
imx_clk_divider2("wrclk_post_div", "wrclk_pre_div", base + 0xbd00, 0,
6);
clks[IMX7D_CLKO1_ROOT_DIV] =
imx_clk_divider2("clko1_post_div", "clko1_pre_div", base + 0xbd80, 0,
6);
clks[IMX7D_CLKO2_ROOT_DIV] =
imx_clk_divider2("clko2_post_div", "clko2_pre_div", base + 0xbe00, 0,
6);
-
+ clks[IMX7D_IPG_ROOT_CLK] = imx_clk_divider2("ipg_root_clk",
"ahb_root_clk", base + 0x9080, 0, 2);
clks[IMX7D_ARM_A7_ROOT_CLK] = imx_clk_gate4("arm_a7_root_clk",
"arm_a7_div", base + 0x4000, 0);
clks[IMX7D_ARM_M4_ROOT_CLK] = imx_clk_gate4("arm_m4_root_clk",
"arm_m4_div", base + 0x4010, 0);
clks[IMX7D_ARM_M0_ROOT_CLK] = imx_clk_gate4("arm_m0_root_clk",
"arm_m0_div", base + 0x4020, 0);
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[PATCH 2/2] ARM: dts: imx7: add USDHC NAND clock to SDHC instances Stefan Agner <stefan@agner.ch> - 2017-03-30 02:50 +0200
Re: [PATCH 2/2] ARM: dts: imx7: add USDHC NAND clock to SDHC instances Dong Aisheng <dongas86@gmail.com> - 2017-03-31 13:10 +0200
Re: [PATCH 2/2] ARM: dts: imx7: add USDHC NAND clock to SDHC instances Stefan Agner <stefan@agner.ch> - 2017-04-01 06:20 +0200
Re: [PATCH 2/2] ARM: dts: imx7: add USDHC NAND clock to SDHC instances Fabio Estevam <festevam@gmail.com> - 2017-04-02 19:10 +0200
Re: [PATCH 2/2] ARM: dts: imx7: add USDHC NAND clock to SDHC instances Fabio Estevam <festevam@gmail.com> - 2017-04-05 04:20 +0200
Re: [PATCH 2/2] ARM: dts: imx7: add USDHC NAND clock to SDHC instances Stefan Agner <stefan@agner.ch> - 2017-04-05 04:40 +0200
Re: [PATCH 2/2] ARM: dts: imx7: add USDHC NAND clock to SDHC instances Dong Aisheng <dongas86@gmail.com> - 2017-04-10 13:10 +0200
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