Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1614807
| From | Paul Cercueil <paul@crapouillou.net> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v4 01/14] dt/bindings: Document pinctrl-ingenic |
| Date | 2017-04-02 22:50 +0200 |
| Message-ID | <trUBJ-5rN-41@gated-at.bofh.it> (permalink) |
| References | <t3AXv-5pP-5@gated-at.bofh.it> <trUBH-5rN-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
This commit adds documentation for the devicetree bindings of the
pinctrl-ingenic driver, which handles pin configuration and pin
muxing of the Ingenic SoCs currently supported by the Linux kernel.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
.../bindings/pinctrl/ingenic,pinctrl.txt | 41 ++++++++++++++++++++++
1 file changed, 41 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
v2: Rewrote the documentation for the new pinctrl-ingenic driver
v3: No changes
v4: Update for the v4 version of the pinctrl-ingenic driver
diff --git a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
new file mode 100644
index 000000000000..0e43b527b681
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
@@ -0,0 +1,41 @@
+Ingenic jz47xx pin controller
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices, including the meaning of the
+phrase "pin configuration node".
+
+For the jz47xx SoCs, pin control is tightly bound with GPIO ports. All pins may
+be used as GPIOs, multiplexed device functions are configured within the
+GPIO port configuration registers and it is typical to refer to pins using the
+naming scheme "PxN" where x is a character identifying the GPIO port with
+which the pin is associated and N is an integer from 0 to 31 identifying the
+pin within that GPIO port. For example PA0 is the first pin in GPIO port A, and
+PB31 is the last pin in GPIO port B. The jz4740 contains 4 GPIO ports, PA to
+PD, for a total of 128 pins. The jz4780 contains 6 GPIO ports, PA to PF, for a
+total of 192 pins.
+
+
+Required properties:
+--------------------
+
+ - compatible: One of:
+ - "ingenic,jz4740-pinctrl"
+ - "ingenic,jz4770-pinctrl"
+ - "ingenic,jz4780-pinctrl"
+ - reg: Address range of the pinctrl registers.
+
+
+GPIO sub-nodes
+--------------
+
+The pinctrl node can have optional sub-nodes for the Ingenic GPIO driver;
+please refer to ../gpio/ingenic,gpio.txt.
+
+
+Example:
+--------
+
+pinctrl: ingenic-pinctrl@10010000 {
+ compatible = "ingenic,jz4740-pinctrl";
+ reg = <0x10010000 0x400>;
+};
--
2.11.0
Back to linux.kernel | Previous | Next — Next in thread | Find similar | Unroll thread
[PATCH v4 01/14] dt/bindings: Document pinctrl-ingenic Paul Cercueil <paul@crapouillou.net> - 2017-04-02 22:50 +0200 Re: [PATCH v4 01/14] dt/bindings: Document pinctrl-ingenic Rob Herring <robh@kernel.org> - 2017-04-04 16:50 +0200
csiph-web