Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1610421
| From | Thomas Gleixner <tglx@linutronix.de> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH V3 2/2] perf/x86: add sysfs entry to freeze counter on SMI |
| Date | 2017-03-28 10:50 +0200 |
| Message-ID | <tpUZc-4Zu-13@gated-at.bofh.it> (permalink) |
| References | <tpHSi-42B-17@gated-at.bofh.it> <tpHSi-42B-21@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Mon, 27 Mar 2017, kan.liang@intel.com wrote:
> +
> + if (val)
> + msr_set_bit_on_cpus(cpu_possible_mask, MSR_IA32_DEBUGCTLMSR, DEBUGCTLMSR_FREEZE_WHILE_SMM_BIT);
> + else
> + msr_clear_bit_on_cpus(cpu_possible_mask, MSR_IA32_DEBUGCTLMSR, DEBUGCTLMSR_FREEZE_WHILE_SMM_BIT);
This is still not protected against CPU hotplug. What's so hard about:
get_online_cpus();
if (val) {
msr_set_bit_on_cpus(cpu_online_mask, MSR_IA32_DEBUGCTLMSR,
DEBUGCTLMSR_FREEZE_WHILE_SMM_BIT);
} else {
msr_clear_bit_on_cpus(cpu_online_mask, MSR_IA32_DEBUGCTLMSR,
DEBUGCTLMSR_FREEZE_WHILE_SMM_BIT);
}
put_online_cpus();
Aside of that, when this is set to SMI freeze, what causes a CPU which
comes online after that point to set the bit as well? Nothing AFAICT.
Thanks,
tglx
Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread
[PATCH V3 2/2] perf/x86: add sysfs entry to freeze counter on SMI kan.liang@intel.com - 2017-03-27 20:50 +0200
Re: [PATCH V3 2/2] perf/x86: add sysfs entry to freeze counter on SMI Thomas Gleixner <tglx@linutronix.de> - 2017-03-28 10:50 +0200
RE: [PATCH V3 2/2] perf/x86: add sysfs entry to freeze counter on SMI "Liang, Kan" <kan.liang@intel.com> - 2017-03-28 15:30 +0200
RE: [PATCH V3 2/2] perf/x86: add sysfs entry to freeze counter on SMI Thomas Gleixner <tglx@linutronix.de> - 2017-03-28 19:10 +0200
csiph-web