Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention

From	Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Newsgroups	linux.kernel
Subject	Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention
Date	2017-03-28 01:50 +0200
Message-ID	<tpMyB-7km-1@gated-at.bofh.it> (permalink)
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On Tue, 2017-03-14 at 00:25 +0300, Stas Sergeev wrote:
> 11.03.2017 02:59, Ricardo Neri пишет:
> > On Fri, 2017-03-10 at 14:33 +0300, Stas Sergeev wrote:
> >
> >> Why would you need one?
> >> Or do you really want to allow these instructions
> >> in v86 by the means of emulation? If so - this wasn't
> >> clearly stated in the patch description, neither it was
> >> properly discussed, it seems.
> > It str and sldt can be emulated in vm86 but as Andy mention, the
> > behavior sould be the same with and without emulation.
> Why would you do that?
> I looked up the dosemu2 CPU simulator code that
> is used under x86-64. It says this:

Stas, I apologize for the delayed reply; I missed your e-mail. 
> ---
>                                      CODE_FLUSH();
>                                      if (REALMODE()) goto illegal_op;
>                                      PC += ModRMSim(PC+1, mode) + 1;
>                                      error("SLDT not implemented\n");
>                                      break;
>                                  case 1: /* STR */
>                                      /* Store Task Register */
>                                      CODE_FLUSH();
>                                      if (REALMODE()) goto illegal_op;
>                                      PC += ModRMSim(PC+1, mode) + 1;
>                                      error("STR not implemented\n");
>                                      break;
> ...
>                                  case 0: /* SGDT */
>                                      /* Store Global Descriptor Table 
> Register */
>                                      PC++; PC += ModRM(opc, PC, 
> mode|DATA16|MSTORE);
>                                      error("SGDT not implemented\n");
>                                      break;
>                                  case 1: /* SIDT */
>                                      /* Store Interrupt Descriptor Table 
> Register */
>                                      PC++; PC += ModRM(opc, PC, 
> mode|DATA16|MSTORE);
>                                      error("SIDT not implemented\n");
>                                      break;
> ---
> 
> It only implements smsw.
> So maybe you can make your code much
> simpler and remove the unneeded emulation?
> Same is for prot mode.

Do you mean the unneeded emulation for SLDT and STR?

> You know the wine's
> requirements now - they are very small. And
> dosemu doesn't need anything at all but smsw.
> And even smsw is very rare.
But emulation is still needed for SMSW, right?

The majority of my patches deal with computing the effective based on
the instruction operands and linear addresses based on the effective
address and the segment descriptor. Only two or three patches deal with
identifying particular UMIP-protected instructions. Not having to worry
about STR and SLDT in vm86 could simplify things a bit, though.

Thanks and BR,
Ricardo

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Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-03-28 01:50 +0200
  Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Stas Sergeev <stsp@list.ru> - 2017-03-28 11:50 +0200
    Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-03-29 06:40 +0200
      Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Stas Sergeev <stsp@list.ru> - 2017-03-29 23:20 +0200
        Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-03-30 07:20 +0200
          Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Stas Sergeev <stsp@list.ru> - 2017-03-30 12:20 +0200
            Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-03-31 03:40 +0200
              Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Alexandre Julliard <julliard@winehq.org> - 2017-03-31 17:00 +0200
                Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Stas Sergeev <stsp@list.ru> - 2017-03-31 23:50 +0200
                Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Andy Lutomirski <luto@kernel.org> - 2017-04-01 04:20 +0200
                Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-04-04 04:10 +0200
                Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Alexandre Julliard <julliard@winehq.org> - 2017-04-04 08:10 +0200
          Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Stas Sergeev <stsp@list.ru> - 2017-04-01 15:10 +0200
            Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention "H. Peter Anvin" <hpa@zytor.com> - 2017-04-01 20:10 +0200
              Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Andy Lutomirski <luto@amacapital.net> - 2017-04-02 18:00 +0200
              Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Stas Sergeev <stsp@list.ru> - 2017-04-04 12:10 +0200
            Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Ricardo Neri <ricardo.neri-calderon@linux.intel.com> - 2017-04-04 04:10 +0200
              Re: [v6 PATCH 00/21] x86: Enable User-Mode Instruction Prevention Stas Sergeev <stsp@list.ru> - 2017-04-04 10:10 +0200

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