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Re: Purpose of PCI address in ranges property

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On Thu, Mar 23, 2017 at 3:59 AM, valmiki <valmikibow@gmail.com> wrote:
> On 3/20/2017 3:15 AM, Arnd Bergmann wrote:
>>
>> On Sun, Mar 19, 2017 at 3:14 PM, valmiki <valmikibow@gmail.com> wrote:
>>>
>>> Hi,
>>>
>>> When ranges property is being parsed using
>>> of_pci_get_host_bridge_resources,
>>> the pci address is being used for
>>> calculating the offset for pci_add_resource_offset.
>>>
>>> What is this offset for ?
>>>
>>> So the cpu address is being used for programming memory base and limit
>>> registers ?
>>
>>
>> Linux IORESOURCE_MEM resources are defined in terms of CPU addresses,
>> while PCI config space BAR registers are programmed with bus addresses.
>> These are often the same, but on some machines they are not, which results
>> in an offset that has to be used when accessing the BARs.
>>
> Thanks Arnd. So mem base and limit registers of RP are programmed with CPU
> addresses,
> and EP BARs are programmed with PCI bus addresses ?
> So when will this offset be used, only when RP assigns BAR's to RP ?

I think depending on your platform, we either assign the BARs or we
read the ones that the firmware has assigned, and either way the
offset has to be applied in or way or the other.

      Arnd

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Purpose of PCI address in ranges property valmiki <valmikibow@gmail.com> - 2017-03-19 15:20 +0100
  Re: Purpose of PCI address in ranges property Arnd Bergmann <arnd@arndb.de> - 2017-03-19 23:00 +0100
    Re: Purpose of PCI address in ranges property valmiki <valmikibow@gmail.com> - 2017-03-23 04:10 +0100
      Re: Purpose of PCI address in ranges property Arnd Bergmann <arnd@arndb.de> - 2017-03-23 15:20 +0100

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