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Groups > linux.kernel > #1599710
| From | Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v2 2/6] powerpc/perf: Export memory hierarchy info to user space |
| Date | 2017-03-13 20:30 +0100 |
| Message-ID | <tkDPj-58M-3@gated-at.bofh.it> (permalink) |
| References | <thYnf-6U9-1@gated-at.bofh.it> <thYnf-6U9-11@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Madhavan Srinivasan [maddy@linux.vnet.ibm.com] wrote:
> The LDST field and DATA_SRC in SIER identifies the memory hierarchy level
> (eg: L1, L2 etc), from which a data-cache miss for a marked instruction
> was satisfied. Use the 'perf_mem_data_src' object to export this
> hierarchy level to user space.
>
<snip>
> diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
> int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp)
> {
> unsigned int unit, pmc, cache, ebb;
> diff --git a/arch/powerpc/perf/isa207-common.h b/arch/powerpc/perf/isa207-common.h
> index cf9bd8990159..982542cce991 100644
> --- a/arch/powerpc/perf/isa207-common.h
> +++ b/arch/powerpc/perf/isa207-common.h
> @@ -259,6 +259,19 @@
> #define MAX_ALT 2
> #define MAX_PMU_COUNTERS 6
>
> +#define ISA207_SIER_TYPE_SHIFT 15
> +#define ISA207_SIER_TYPE_MASK (0x7ull << ISA207_SIER_TYPE_SHIFT)
> +
> +#define ISA207_SIER_LDST_SHIFT 1
> +#define ISA207_SIER_LDST_MASK (0x7ull << ISA207_SIER_LDST_SHIFT)
> +
> +#define ISA207_SIER_DATA_SRC_SHIFT 53
> +#define ISA207_SIER_DATA_SRC_MASK (0x7ull << ISA207_SIER_DATA_SRC_SHIFT)
> +
> +#define P(a, b) PERF_MEM_S(a, b)
Madhavan, Peter,
Can we see if we can get the kernel to set 'perf_mem_data_src.val' in
endian-nuetral format?
With something like (untested) in include/uapi/linux/perf_event.h
#define PERF_MEM_OP_NBITS PERF_MEM_LVL_SHIFT
#define PERF_MEM_LVL_NBITS PERF_MEM_SNOOP_SHIFT
#define PERF_MEM_SNOOP_NBITS PERF_MEM_LOCK_SHIFT
#define PERF_MEM_TLB_NBITS PERF_MEM_TLB_SHIFT
and here in arch/powerpc/perf/isa207-common.h
#define PERF_MEM_S_BE_SHIFT(a) \
(63 - PERF_MEM_##a##_NBITS - PERF_MEM_##a##_SHIFT)
#define PERF_MEM_S_BE(a, s) \
(((__u64)PERF_MEM_##a##_##s) << PERF_MEM_S_BE_SHIFT(a))
#define P(a, b) PERF_MEM_S_BE(a, b)
Basically, have PERF_MEM_OP_NA be the right most bit and PERF_MEM_TLB_OS
the left most bit in perf_mem_data_src.val regardless of the endianness?
Sukadev
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[PATCH v2 0/6] powerpc/perf: Export memory hierarchy level Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-03-06 11:50 +0100
[PATCH v2 2/6] powerpc/perf: Export memory hierarchy info to user space Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-03-06 11:50 +0100
Re: [PATCH v2 2/6] powerpc/perf: Export memory hierarchy info to user space Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> - 2017-03-13 20:30 +0100
[PATCH v2 3/6] powerpc/perf: Support to export MMCRA[TEC*] field to userspace Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-03-06 11:50 +0100
[PATCH v2 5/6] powerpc/perf: Support to export SIERs bit in Power9 Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-03-06 11:50 +0100
[PATCH v2 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-03-06 11:50 +0100
Re: [PATCH v2 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Peter Zijlstra <peterz@infradead.org> - 2017-03-06 12:30 +0100
RE: [PATCH v2 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src David Laight <David.Laight@ACULAB.COM> - 2017-03-06 16:10 +0100
Re: [PATCH v2 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Peter Zijlstra <peterz@infradead.org> - 2017-03-06 16:30 +0100
Re: [PATCH v2 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Peter Zijlstra <peterz@infradead.org> - 2017-03-07 13:50 +0100
Re: [PATCH v2 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-03-13 12:20 +0100
Re: [PATCH v2 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Peter Zijlstra <peterz@infradead.org> - 2017-03-13 14:00 +0100
Re: [PATCH v2 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-03-14 10:10 +0100
Re: [PATCH v2 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Peter Zijlstra <peterz@infradead.org> - 2017-03-14 14:00 +0100
Re: [PATCH v2 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Michael Ellerman <mpe@ellerman.id.au> - 2017-03-15 07:30 +0100
Re: [PATCH v2 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Peter Zijlstra <peterz@infradead.org> - 2017-03-15 13:30 +0100
Re: [PATCH v2 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-03-16 07:00 +0100
Re: [PATCH v2 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-03-16 06:50 +0100
Re: [PATCH v2 1/6] powerpc/perf: Define big-endian version of perf_mem_data_src Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-03-07 13:50 +0100
[PATCH v2 6/6] powerpc/perf: Add Power8 mem_access event to sysfs Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-03-06 15:10 +0100
[PATCH v2 4/6] powerpc/perf: Support to export SIERs bit in Power8 Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-03-06 16:00 +0100
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