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Groups > linux.kernel > #1595896
| From | Chen-Yu Tsai <wens@csie.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [linux-sunxi] [PATCH v3 1/5] dt: bindings: add pmu0 regs for USB PHYs on Allwinner H3/V3s/A64 |
| Date | 2017-03-09 11:40 +0100 |
| Message-ID | <tj3Ee-3Ue-19@gated-at.bofh.it> (permalink) |
| References | <tidvX-Hj-7@gated-at.bofh.it> <tj3Ee-3Ue-21@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Tue, Mar 7, 2017 at 6:34 AM, Icenowy Zheng <icenowy@aosc.xyz> wrote: > Allwinner H3/V3s/A64 SoCs have a special USB PHY0 that can route to two > controllers: one is MUSB and the other is a EHCI/OHCI pair. > > When it's routed to EHCI/OHCI pair, it will needs a "pmu0" regs to > tweak, like other EHCI/OHCI pairs in Allwinner SoCs. > > Add this to the binding of USB PHYs on Allwinner H3/V3s/A64. > > Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Chen-Yu Tsai <wens@csie.org>
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Re: [linux-sunxi] [PATCH v3 1/5] dt: bindings: add pmu0 regs for USB PHYs on Allwinner H3/V3s/A64 Chen-Yu Tsai <wens@csie.org> - 2017-03-09 11:40 +0100
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