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Groups > linux.kernel > #1594236
| From | Hanjun Guo <hanjun.guo@linaro.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 00/17] clocksource/arch_timer: Errara workaround infrastructure rework |
| Date | 2017-03-07 14:30 +0100 |
| Message-ID | <tinlD-83G-7@gated-at.bofh.it> (permalink) |
| References | <thYZX-7uY-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Hi Marc, On 2017/3/6 19:26, Marc Zyngier wrote: > It has recently become obvious that a number of arm64 systems have > been blessed with a set of timers that are slightly less than perfect, > and require a bit of hand-holding. We already have a bunch of > errata-specific code to deal with this, but as we're adding more > potential detection methods (DT, ACPI, capability), things are getting > a bit out of hands. > > Instead of adding more ad-hoc fixes to an already difficult code base, > let's give ourselves a bit of an infrastructure that can deal with > this and hide most of the uggliness behind frendly accessors. > > The series is structured as such: > > - The first half of the series rework the existing workarounds, > allowing errata to be matched using a given detection method > > - Another patch allows a workaround to affect a subset of the CPUs, > and not the whole system > > - Another set of patches allow the virtual counter to be trapped when > accessed from userspace (something that affects the current set of > broken platform, and that is not worked around yet) > > - We then work around a Cortex-A73 erratum, whose counter can return a > wrong value if read while crossing a 32bit boundary > > - Finally, we add some ACPI-specific workarounds for HiSilicon > platforms that have the HISILICON_ERRATUM_161010101 defect. Thanks for doing this, I tested this patch set on D03, and it boots OK with log: [ 0.000000] arm_arch_timer: Enabling global workaround for HiSilicon erratum 161010101 [ 0.000000] arm_arch_timer: CPU0: Trapping CNTVCT access [ 0.000000] arm_arch_timer: Architected cp15 timer(s) running at 50.00MHz (phys). With patches other than Cortex-A73 erratum, Tested-by: Hanjun Guo <hanjun.guo@linaro.org> Thanks Hanjun
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[PATCH 00/17] clocksource/arch_timer: Errara workaround infrastructure rework Marc Zyngier <marc.zyngier@arm.com> - 2017-03-06 12:40 +0100
[PATCH 05/17] arm64: arch_timer: Move arch_timer_reg_read/write around Marc Zyngier <marc.zyngier@arm.com> - 2017-03-06 12:40 +0100
[PATCH 01/17] arm64: arch_timer: Add infrastructure for multiple erratum detection methods Marc Zyngier <marc.zyngier@arm.com> - 2017-03-06 12:40 +0100
Re: [PATCH 01/17] arm64: arch_timer: Add infrastructure for multiple erratum detection methods Hanjun Guo <hanjun.guo@linaro.org> - 2017-03-07 18:00 +0100
[PATCH 04/17] arm64: arch_timer: Add erratum handler for CPU-specific capability Marc Zyngier <marc.zyngier@arm.com> - 2017-03-06 12:40 +0100
[PATCH 07/17] arm64: arch_timer: Rework the set_next_event workarounds Marc Zyngier <marc.zyngier@arm.com> - 2017-03-06 12:40 +0100
Re: [PATCH 07/17] arm64: arch_timer: Rework the set_next_event workarounds Hanjun Guo <hanjun.guo@linaro.org> - 2017-03-07 14:30 +0100
[PATCH 06/17] arm64: arch_timer: Get rid of erratum_workaround_set_sne Marc Zyngier <marc.zyngier@arm.com> - 2017-03-06 12:40 +0100
[PATCH 13/17] arm64: cpu_errata: Allow an erratum to be match for all revisions of a core Marc Zyngier <marc.zyngier@arm.com> - 2017-03-06 12:40 +0100
[PATCH 08/17] arm64: arch_timer: Make workaround methods optional Marc Zyngier <marc.zyngier@arm.com> - 2017-03-06 12:40 +0100
[PATCH 02/17] arm64: arch_timer: Add erratum handler for globally defined capability Marc Zyngier <marc.zyngier@arm.com> - 2017-03-06 12:40 +0100
Re: [PATCH 00/17] clocksource/arch_timer: Errara workaround infrastructure rework dann frazier <dann.frazier@canonical.com> - 2017-03-06 23:10 +0100
Re: [PATCH 00/17] clocksource/arch_timer: Errara workaround infrastructure rework Hanjun Guo <hanjun.guo@linaro.org> - 2017-03-07 14:30 +0100
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