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[PATCH 04/20] ARM64: implement pci_remap_cfgspace() interface

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The PCI bus specifications (rev 3.0, 3.2.5 "Transaction Ordering
and Posting") defines rules for PCI configuration space transactions
ordering and posting, that state that configuration writes
are non-posted transactions.

This rule is reinforced by the ARM v8 architecture reference manual
(issue A.k, Early Write Acknowledgment) that explicitly recommends
that No Early Write Acknowledgment attribute should be used to map
PCI configuration (write) transactions.

Current ioremap interface on ARM64 implements mapping functions
where the Early Write Acknowledgment hint is enabled, so they
cannot be used to map PCI configuration space in a PCI specs
compliant way.

Implement an ARM64 specific pci_remap_cfgspace() interface
that allows to map PCI config region with nGnRnE attributes, providing
a remap function that complies with PCI specifications and the ARMv8
architecture reference manual recommendations.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
---
 arch/arm64/include/asm/io.h | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index 0c00c87..7a03250 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h
@@ -173,6 +173,16 @@ extern void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size);
 #define iounmap				__iounmap
 
 /*
+ * PCI configuration space mapping function.
+ *
+ * PCI specifications disallows posted write configuration transactions.
+ * Add an arch specific pci_remap_cfgspace definition that is implemented
+ * through nGnRnE device memory attribute as recommended by the ARM v8
+ * Architecture reference manual Issue A.k B2.8.2 "Device memory".
+ */
+#define pci_remap_cfgspace(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRnE))
+
+/*
  * io{read,write}{16,32,64}be() macros
  */
 #define ioread16be(p)		({ __u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })
-- 
2.10.0

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[PATCH 00/20] PCI: fix config and I/O Address space memory mappings Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> - 2017-02-27 16:20 +0100
  [PATCH 17/20] PCI: xgene: update PCI config space remap function Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> - 2017-02-27 16:20 +0100
  [PATCH 03/20] asm-generic/io.h: add PCI config space remap interface Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> - 2017-02-27 16:20 +0100
  [PATCH 15/20] PCI: designware: update PCI config space remap function Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> - 2017-02-27 16:20 +0100
  [PATCH 04/20] ARM64: implement pci_remap_cfgspace() interface Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> - 2017-02-27 16:20 +0100
  [PATCH 14/20] PCI: hisi: update PCI config space remap function Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> - 2017-02-27 16:20 +0100
  [PATCH 01/20] PCI: remove __weak tag from pci_remap_iospace() Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> - 2017-02-27 16:30 +0100
  [PATCH 05/20] ARM: implement pci_remap_cfgspace() interface Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> - 2017-02-27 16:30 +0100
  [PATCH 08/20] PCI: xilinx: update PCI config space remap function Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> - 2017-02-27 16:30 +0100
  [PATCH 10/20] PCI: spear13xx: update PCI config space remap function Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> - 2017-02-27 16:30 +0100
  [PATCH 06/20] PCI: ECAM: use pci_remap_cfgspace() to map config region Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> - 2017-02-27 16:30 +0100
  [PATCH 07/20] PCI: implement Devres interface to map PCI config space Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> - 2017-02-27 16:30 +0100
    Re: [PATCH 07/20] PCI: implement Devres interface to map PCI config  space Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> - 2017-02-28 11:50 +0100
  [PATCH 09/20] PCI: xilinx-nwl: update PCI config space remap function Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> - 2017-02-27 16:30 +0100

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