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[PATCH v4 13/23] drm/rockchip: dw-mipi-dsi: fix escape clock rate

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This clock rate is derived from the PHY PLL, so it should be calculated
dynamically.  This calculation is the same as that used by the vendor
kernel and ensures that the escape clock runs at <20MHz as required by
the MIPI specification.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
---
v4:
- Add a comment explaining the calculation and reword the commit message
  so that the calculation doesn't seem so magical
- Add Sean's Reviewed-by
v3:
- Improve the commit message a bit
- Add Chris' Reviewed-by
Unchanged in v2
---
 drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
index 4201a2143295..0f9be41f0361 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
@@ -712,11 +712,21 @@ static void dw_mipi_dsi_disable(struct dw_mipi_dsi *dsi)
 
 static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi)
 {
+	/*
+	 * The maximum permitted escape clock is 20MHz and it is derived from
+	 * lanebyteclk, which is running at "lane_mbps / 8".  Thus we want:
+	 *
+	 *     (lane_mbps >> 3) / esc_clk_division < 20
+	 * which is:
+	 *     (lane_mbps >> 3) / 20 > esc_clk_division
+	 */
+	u32 esc_clk_division = (dsi->lane_mbps >> 3) / 20 + 1;
+
 	dsi_write(dsi, DSI_PWR_UP, RESET);
 	dsi_write(dsi, DSI_PHY_RSTZ, PHY_DISFORCEPLL | PHY_DISABLECLK
 		  | PHY_RSTZ | PHY_SHUTDOWNZ);
 	dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVIDSION(10) |
-		  TX_ESC_CLK_DIVIDSION(7));
+		  TX_ESC_CLK_DIVIDSION(esc_clk_division));
 }
 
 static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
-- 
2.12.0.rc0.230.gf625d4cdb9.dirty

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[PATCH v4 00/23] drm/rockchip: MIPI fixes & improvements John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 18/23] drm/rockchip: dw-mipi-dsi: use specific poll helper John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 13/23] drm/rockchip: dw-mipi-dsi: fix escape clock rate John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 23/23] drm/rockchip: dw-mipi-dsi: add reset control John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 12/23] drm/rockchip: dw-mipi-dsi: allow commands in panel_disable John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 02/23] drm/rockchip: dw-mipi-dsi: pass mode in where needed John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 07/23] drm/rockchip: dw-mipi-dsi: include bad value in error message John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 21/23] drm/rockchip: dw-mipi-dsi: defer probe if panel is not loaded John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 19/23] drm/rockchip: dw-mipi-dsi: use positive check for N{H,V}SYNC John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 06/23] drm/rockchip: dw-mipi-dsi: avoid out-of-bounds read on tx_buf John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 15/23] drm/rockchip: dw-mipi-dsi: configure PHY before enabling John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 08/23] drm/rockchip: dw-mipi-dsi: respect message flags John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 04/23] drm/rockchip: dw-mipi-dsi: fix command header writes John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 10/23] drm/rockchip: dw-mipi-dsi: don't assume buffer is aligned John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 11/23] drm/rockchip: dw-mipi-dsi: prepare panel after phy init John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 17/23] drm/rockchip: dw-mipi-dsi: improve PLL configuration John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 09/23] drm/rockchip: dw-mipi-dsi: only request HS clock when required John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 03/23] drm/rockchip: dw-mipi-dsi: remove mode_set hook John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 05/23] drm/rockchip: dw-mipi-dsi: fix generic packet status check John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 01/23] drm/rockchip: dw-mipi-dsi: don't configure hardware in mode_set for MIPI John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 16/23] drm/rockchip: dw-mipi-dsi: properly configure PHY timing John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
  [PATCH v4 22/23] drm/rockchip: dw-mipi-dsi: support non-burst modes John Keeping <john@metanate.com> - 2017-02-24 14:10 +0100
  Re: [PATCH v4 00/23] drm/rockchip: MIPI fixes & improvements Mark yao <mark.yao@rock-chips.com> - 2017-02-27 02:50 +0100
  Re: [PATCH v4 00/23] drm/rockchip: MIPI fixes & improvements Chris Zhong <zyw@rock-chips.com> - 2017-02-27 04:40 +0100

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