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Groups > linux.kernel > #1583449

[PATCHv3 30/33] x86/mm: make kernel_physical_mapping_init() support 5-level paging

From "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Newsgroups linux.kernel
Subject [PATCHv3 30/33] x86/mm: make kernel_physical_mapping_init() support 5-level paging
Date 2017-02-17 15:20 +0100
Message-ID <tbRya-5mq-29@gated-at.bofh.it> (permalink)
References <tbRy9-5mq-3@gated-at.bofh.it>
Organization linux.* mail to news gateway

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Properly populate addition pagetable level if CONFIG_X86_5LEVEL is
enabled.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
---
 arch/x86/mm/init_64.c | 71 ++++++++++++++++++++++++++++++++++++++++++++-------
 1 file changed, 62 insertions(+), 9 deletions(-)

diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index 58be5713ec09..d53eda53419d 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -622,6 +622,58 @@ phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_end,
 	return paddr_last;
 }
 
+static unsigned long __meminit
+phys_p4d_init(p4d_t *p4d_page, unsigned long paddr, unsigned long paddr_end,
+	      unsigned long page_size_mask)
+{
+	unsigned long paddr_next, paddr_last = paddr_end;
+	unsigned long vaddr = (unsigned long)__va(paddr);
+	int i = p4d_index(vaddr);
+
+	if (!IS_ENABLED(CONFIG_X86_5LEVEL))
+		return phys_pud_init((pud_t *) p4d_page, paddr, paddr_end, page_size_mask);
+
+	for (; i < PTRS_PER_P4D; i++, paddr = paddr_next) {
+		p4d_t *p4d;
+		pud_t *pud;
+
+		vaddr = (unsigned long)__va(paddr);
+		p4d = p4d_page + p4d_index(vaddr);
+		paddr_next = (paddr & P4D_MASK) + P4D_SIZE;
+
+		if (paddr >= paddr_end) {
+			if (!after_bootmem &&
+			    !e820_any_mapped(paddr & P4D_MASK, paddr_next,
+					     E820_RAM) &&
+			    !e820_any_mapped(paddr & P4D_MASK, paddr_next,
+					     E820_RESERVED_KERN)) {
+				set_p4d(p4d, __p4d(0));
+			}
+			continue;
+		}
+
+		if (!p4d_none(*p4d)) {
+			pud = pud_offset(p4d, 0);
+			paddr_last = phys_pud_init(pud, paddr,
+					paddr_end,
+					page_size_mask);
+			__flush_tlb_all();
+			continue;
+		}
+
+		pud = alloc_low_page();
+		paddr_last = phys_pud_init(pud, paddr, paddr_end,
+					   page_size_mask);
+
+		spin_lock(&init_mm.page_table_lock);
+		p4d_populate(&init_mm, p4d, pud);
+		spin_unlock(&init_mm.page_table_lock);
+	}
+	__flush_tlb_all();
+
+	return paddr_last;
+}
+
 /*
  * Create page table mapping for the physical memory for specific physical
  * addresses. The virtual and physical addresses have to be aligned on PMD level
@@ -643,26 +695,27 @@ kernel_physical_mapping_init(unsigned long paddr_start,
 	for (; vaddr < vaddr_end; vaddr = vaddr_next) {
 		pgd_t *pgd = pgd_offset_k(vaddr);
 		p4d_t *p4d;
-		pud_t *pud;
 
 		vaddr_next = (vaddr & PGDIR_MASK) + PGDIR_SIZE;
 
-		BUILD_BUG_ON(pgd_none(*pgd));
-		p4d = p4d_offset(pgd, vaddr);
-		if (p4d_val(*p4d)) {
-			pud = (pud_t *)p4d_page_vaddr(*p4d);
-			paddr_last = phys_pud_init(pud, __pa(vaddr),
+		if (pgd_val(*pgd)) {
+			p4d = (p4d_t *)pgd_page_vaddr(*pgd);
+			paddr_last = phys_p4d_init(p4d, __pa(vaddr),
 						   __pa(vaddr_end),
 						   page_size_mask);
 			continue;
 		}
 
-		pud = alloc_low_page();
-		paddr_last = phys_pud_init(pud, __pa(vaddr), __pa(vaddr_end),
+		p4d = alloc_low_page();
+		paddr_last = phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end),
 					   page_size_mask);
 
 		spin_lock(&init_mm.page_table_lock);
-		p4d_populate(&init_mm, p4d, pud);
+		if (IS_ENABLED(CONFIG_X86_5LEVEL))
+			pgd_populate(&init_mm, pgd, p4d);
+		else
+			p4d_populate(&init_mm, p4d_offset(pgd, vaddr),
+					(pud_t *) p4d);
 		spin_unlock(&init_mm.page_table_lock);
 		pgd_changed = true;
 	}
-- 
2.11.0

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Thread

[PATCHv3 00/33] 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:20 +0100
  [PATCHv3 30/33] x86/mm: make kernel_physical_mapping_init() support 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:20 +0100
  [PATCHv3 14/33] x86/kexec: support p4d_t "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:20 +0100
  [PATCHv3 25/33] x86/dump_pagetables: support 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:20 +0100
  [PATCHv3 12/33] x86/mm: add support of p4d_t in vmalloc_fault() "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:20 +0100
  [PATCHv3 10/33] x86/gup: add 5-level paging support "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:20 +0100
  [PATCHv3 27/33] x86/espfix: support 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:20 +0100
  [PATCHv3 05/33] asm-generic: introduce <asm-generic/pgtable-nop4d.h> "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:20 +0100
  [PATCHv3 15/33] x86/efi: handle p4d in EFI pagetables "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:20 +0100
    Re: [PATCHv3 15/33] x86/efi: handle p4d in EFI pagetables Matt Fleming <matt@codeblueprint.co.uk> - 2017-02-28 13:40 +0100
  [PATCHv3 32/33] x86: enable 5-level paging support "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:20 +0100
  [PATCHv3 26/33] x86/kasan: extend to support 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:20 +0100
  [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and PR_GET_MAX_VADDR "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:20 +0100
    Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and PR_GET_MAX_VADDR Andy Lutomirski <luto@amacapital.net> - 2017-02-17 18:00 +0100
      Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and PR_GET_MAX_VADDR Dmitry Safonov <0x7f454c46@gmail.com> - 2017-02-21 13:00 +0100
        Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and  PR_GET_MAX_VADDR "Kirill A. Shutemov" <kirill@shutemov.name> - 2017-02-21 13:50 +0100
    Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and  PR_GET_MAX_VADDR Dave Hansen <dave.hansen@intel.com> - 2017-02-17 18:30 +0100
      Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and PR_GET_MAX_VADDR Andy Lutomirski <luto@amacapital.net> - 2017-02-17 18:30 +0100
    Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and PR_GET_MAX_VADDR Linus Torvalds <torvalds@linux-foundation.org> - 2017-02-17 21:10 +0100
      Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and PR_GET_MAX_VADDR Andy Lutomirski <luto@amacapital.net> - 2017-02-17 21:30 +0100
        Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and PR_GET_MAX_VADDR Linus Torvalds <torvalds@linux-foundation.org> - 2017-02-17 22:10 +0100
          Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and PR_GET_MAX_VADDR Andy Lutomirski <luto@amacapital.net> - 2017-02-18 00:10 +0100
            Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and PR_GET_MAX_VADDR hpa@zytor.com - 2017-02-18 00:20 +0100
            Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and PR_GET_MAX_VADDR Michael Pratt <mpratt@google.com> - 2017-02-21 07:20 +0100
            Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and  PR_GET_MAX_VADDR Catalin Marinas <catalin.marinas@arm.com> - 2017-02-21 11:40 +0100
              Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and  PR_GET_MAX_VADDR "Kirill A. Shutemov" <kirill@shutemov.name> - 2017-02-21 11:50 +0100
                Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and  PR_GET_MAX_VADDR Catalin Marinas <catalin.marinas@arm.com> - 2017-02-21 12:00 +0100
      Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and  PR_GET_MAX_VADDR Dave Hansen <dave.hansen@intel.com> - 2017-02-17 22:10 +0100
        Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and PR_GET_MAX_VADDR Linus Torvalds <torvalds@linux-foundation.org> - 2017-02-17 22:20 +0100
          Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and PR_GET_MAX_VADDR hpa@zytor.com - 2017-02-17 23:00 +0100
      Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and  PR_GET_MAX_VADDR "Kirill A. Shutemov" <kirill@shutemov.name> - 2017-02-18 10:30 +0100
        Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and  PR_GET_MAX_VADDR "Kirill A. Shutemov" <kirill@shutemov.name> - 2017-02-20 14:20 +0100
          Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and  PR_GET_MAX_VADDR Dave Hansen <dave.hansen@intel.com> - 2017-02-21 21:50 +0100
            Re: [PATCHv3 33/33] mm, x86: introduce PR_SET_MAX_VADDR and  PR_GET_MAX_VADDR "Kirill A. Shutemov" <kirill@shutemov.name> - 2017-02-22 14:10 +0100
  [PATCHv3 23/33] x86/paravirt: make paravirt code support 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:30 +0100
  [PATCHv3 13/33] x86/power: support p4d_t in hibernate code "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:30 +0100
  [PATCHv3 28/33] x86/mm: add support of additional page table level during early boot "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:30 +0100
  [PATCHv3 21/33] x86/asm: remove __VIRTUAL_MASK_SHIFT==47 assert "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:30 +0100
  [PATCHv3 04/33] arch, mm: convert all architectures to use 5level-fixup.h "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:30 +0100
  [PATCHv3 01/33] x86/cpufeature: Add 5-level paging detection "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:30 +0100
  [PATCHv3 08/33] x86: basic changes into headers for 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:30 +0100
  [PATCHv3 03/33] asm-generic: introduce __ARCH_USE_5LEVEL_HACK "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:30 +0100
  [PATCHv3 07/33] mm: introduce __p4d_alloc() "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:30 +0100
  [PATCHv3 16/33] x86/mm/pat: handle additional page table "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:30 +0100
  [PATCHv3 19/33] x86: convert the rest of the code to support p4d_t "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:30 +0100
  [PATCHv3 11/33] x86/ident_map: add 5-level paging support "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:30 +0100
  [PATCHv3 18/33] x86/xen: convert __xen_pgd_walk() and xen_cleanmfnmap() to support p4d "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-02-17 15:30 +0100

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