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Groups > linux.kernel > #1681414
| From | Will Deacon <will.deacon@arm.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH] doc: Update memory-barriers.txt for read-to-write dependencies |
| Date | 2017-07-05 11:50 +0200 |
| Message-ID | <tZP6y-4wR-5@gated-at.bofh.it> (permalink) |
| References | <tYdwl-3rt-11@gated-at.bofh.it> <tZ9h2-1TK-39@gated-at.bofh.it> <tZdDX-4Ft-1@gated-at.bofh.it> <tZz1L-2qe-1@gated-at.bofh.it> <tZDRM-5zw-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Tue, Jul 04, 2017 at 02:46:51PM -0700, Paul E. McKenney wrote: > On Tue, Jul 04, 2017 at 05:36:36PM +0100, Will Deacon wrote: > > On Mon, Jul 03, 2017 at 10:41:06AM -0700, Paul E. McKenney wrote: > > > diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt > > > index 9d5e0f853f08..7be80911e502 100644 > > > --- a/Documentation/memory-barriers.txt > > > +++ b/Documentation/memory-barriers.txt > > > @@ -594,7 +594,23 @@ between the address load and the data load: > > > This enforces the occurrence of one of the two implications, and prevents the > > > third possibility from arising. > > > > > > -A data-dependency barrier must also order against dependent writes: > > > + > > > +[!] Note that this extremely counterintuitive situation arises most easily on > > > +machines with split caches, so that, for example, one cache bank processes > > > +even-numbered cache lines and the other bank processes odd-numbered cache > > > +lines. The pointer P might be stored in an odd-numbered cache line, and the > > > +variable B might be stored in an even-numbered cache line. Then, if the > > > +even-numbered bank of the reading CPU's cache is extremely busy while the > > > +odd-numbered bank is idle, one can see the new value of the pointer P (&B), > > > +but the old value of the variable B (2). > > > + > > > + > > > +A data-dependency barrier is not required to order dependent writes > > > +because the CPUs that the Linux kernel supports don't do writes until > > > +they are certain (1) that the write will actually happen, (2) of the > > > +location of the write, and (3) of the value to be written. But please > > > +carefully read the "CONTROL DEPENDENCIES" section: The compiler can > > > +and does break control dependencies in a great many situations. > > > > This makes it sound like only control dependencies are susceptible to > > being broken by compiler optimisations, so I'd drop the "control" and > > just say "The compiler can and does break dependencies in a great many > > situations". > > > > With that: > > > > Acked-by: Will Deacon <will.deacon@arm.com> > > Done! I also added a pointer to Documentation/RCU/rcu_dereference.txt, > which lists some of the vandalism^Woptimizations that modern compilers > can commit. Does the updated patch below capture it? Yes, thanks Paul. Will
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Re: [PATCH] doc: Update memory-barriers.txt for read-to-write dependencies "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> - 2017-07-03 19:50 +0200
Re: [PATCH] doc: Update memory-barriers.txt for read-to-write dependencies Will Deacon <will.deacon@arm.com> - 2017-07-04 18:40 +0200
Re: [PATCH] doc: Update memory-barriers.txt for read-to-write dependencies "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> - 2017-07-04 23:50 +0200
Re: [PATCH] doc: Update memory-barriers.txt for read-to-write dependencies Will Deacon <will.deacon@arm.com> - 2017-07-05 11:50 +0200
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