Re: [PATCH 1/2] pinctrl: armada-37xx: Fix uart2 group selection register mask

From	Linus Walleij <linus.walleij@linaro.org>
Newsgroups	linux.kernel
Subject	Re: [PATCH 1/2] pinctrl: armada-37xx: Fix uart2 group selection register mask
Date	2017-06-29 11:50 +0200
Message-ID	<tXEfh-5VQ-25@gated-at.bofh.it> (permalink)
References	<tVw2u-27W-3@gated-at.bofh.it> <tVw2u-27W-21@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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On Fri, Jun 23, 2017 at 2:29 PM, Gregory CLEMENT
<gregory.clement@free-electrons.com> wrote:

> From: Ken Ma <make@marvell.com>
>
> If north bridge selection register bit1 is clear, pins [10:8] are for
> SDIO0 Resetn, Wakeup, and PDN while if bit1 is set, pins [10:8]are for
> GPIO; when bit1 is clear, pin 9 and pin 10 can be used for uart2 RTSn
> and CTSn, so bit1 should be added to uart2 group and it must be set
> for both "gpio" and "uart" functions of uart2 group.
>
> Signed-off-by: Ken Ma <make@marvell.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Patch applied.

Yours,
Linus Walleij

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[PATCH 0/2] Couple of fixes for pinctrl-armada-37xx Gregory CLEMENT <gregory.clement@free-electrons.com> - 2017-06-23 14:40 +0200
  [PATCH 1/2] pinctrl: armada-37xx: Fix uart2 group selection register mask Gregory CLEMENT <gregory.clement@free-electrons.com> - 2017-06-23 14:40 +0200
    Re: [PATCH 1/2] pinctrl: armada-37xx: Fix uart2 group selection  register mask Linus Walleij <linus.walleij@linaro.org> - 2017-06-29 11:50 +0200

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