[PATCH 14/14] qcom: mtd: nand: programmed NAND_DEV_CMD_VLD register

From	Abhishek Sahu <absahu@codeaurora.org>
Newsgroups	linux.kernel
Subject	[PATCH 14/14] qcom: mtd: nand: programmed NAND_DEV_CMD_VLD register
Date	2017-06-29 09:20 +0200
Message-ID	<tXBU8-4BD-31@gated-at.bofh.it> (permalink)
References	<tXBU5-4BD-3@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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The current driver is failing without complete bootchain in
BAM mode since NAND_DEV_CMD_VLD value is not valid. So
programmed the required value in NAND_DEV_CMD_VLD register.

Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
---
 drivers/mtd/nand/qcom_nandc.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/mtd/nand/qcom_nandc.c b/drivers/mtd/nand/qcom_nandc.c
index 641e85d..260167b 100644
--- a/drivers/mtd/nand/qcom_nandc.c
+++ b/drivers/mtd/nand/qcom_nandc.c
@@ -121,6 +121,9 @@
 
 /* NAND_CTRL bits */
 #define	BAM_MODE_EN			BIT(0)
+
+/* Value for NAND_DEV_CMD_VLD */
+#define NAND_DEV_CMD_VLD_VAL		(0x1d)
 /*
  * the NAND controller performs reads/writes with ECC in 516 byte chunks.
  * the driver calls the chunks 'step' or 'codeword' interchangeably
@@ -2676,6 +2679,7 @@ static int qcom_nandc_setup(struct qcom_nand_controller *nandc)
 
 	/* kill onenand */
 	nandc_write(nandc, SFLASHC_BURST_CFG, 0);
+	nandc_write(nandc, NAND_DEV_CMD_VLD, NAND_DEV_CMD_VLD_VAL);
 
 	/* enable ADM or BAM DMA */
 	if (!nandc->dma_bam_enabled) {
-- 
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[PATCH 14/14] qcom: mtd: nand: programmed NAND_DEV_CMD_VLD register Abhishek Sahu <absahu@codeaurora.org> - 2017-06-29 09:20 +0200

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