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Groups > linux.kernel > #1673495
| From | Borislav Petkov <bp@alien8.de> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v3 10/11] x86/mm: Enable CR4.PCIDE on supported systems |
| Date | 2017-06-23 14:00 +0200 |
| Message-ID | <tVvpL-1FF-1@gated-at.bofh.it> (permalink) |
| References | <tUGnf-1Tn-3@gated-at.bofh.it> <tUGnh-1Tn-41@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Tue, Jun 20, 2017 at 10:22:16PM -0700, Andy Lutomirski wrote:
> We can use PCID if the CPU has PCID and PGE and we're not on Xen.
>
> By itself, this has no effect. The next patch will start using
> PCID.
>
> Cc: Juergen Gross <jgross@suse.com>
> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
> Signed-off-by: Andy Lutomirski <luto@kernel.org>
> ---
> arch/x86/include/asm/tlbflush.h | 8 ++++++++
> arch/x86/kernel/cpu/common.c | 15 +++++++++++++++
> arch/x86/xen/enlighten_pv.c | 6 ++++++
> 3 files changed, 29 insertions(+)
>
> diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
> index 87b13e51e867..57b305e13c4c 100644
> --- a/arch/x86/include/asm/tlbflush.h
> +++ b/arch/x86/include/asm/tlbflush.h
> @@ -243,6 +243,14 @@ static inline void __flush_tlb_all(void)
> __flush_tlb_global();
> else
> __flush_tlb();
> +
> + /*
> + * Note: if we somehow had PCID but not PGE, then this wouldn't work --
> + * we'd end up flushing kernel translations for the current ASID but
> + * we might fail to flush kernel translations for other cached ASIDs.
> + *
> + * To avoid this issue, we force PCID off if PGE is off.
> + */
> }
>
> static inline void __flush_tlb_one(unsigned long addr)
> diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
> index 904485e7b230..01caf66b270f 100644
> --- a/arch/x86/kernel/cpu/common.c
> +++ b/arch/x86/kernel/cpu/common.c
> @@ -1143,6 +1143,21 @@ static void identify_cpu(struct cpuinfo_x86 *c)
> setup_smep(c);
> setup_smap(c);
>
> + /* Set up PCID */
> + if (cpu_has(c, X86_FEATURE_PCID)) {
> + if (cpu_has(c, X86_FEATURE_PGE)) {
What are we protecting ourselves here against? Funny virtualization guests?
Because PGE should be ubiquitous by now. Or have you heard something?
> + cr4_set_bits(X86_CR4_PCIDE);
> + } else {
> + /*
> + * flush_tlb_all(), as currently implemented, won't
> + * work if PCID is on but PGE is not. Since that
> + * combination doesn't exist on real hardware, there's
> + * no reason to try to fully support it.
> + */
> + clear_cpu_cap(c, X86_FEATURE_PCID);
> + }
> + }
This whole in setup_pcid() I guess, like the rest of the features.
> +
> /*
> * The vendor-specific functions might have changed features.
> * Now we do "generic changes."
> diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
> index f33eef4ebd12..a136aac543c3 100644
> --- a/arch/x86/xen/enlighten_pv.c
> +++ b/arch/x86/xen/enlighten_pv.c
> @@ -295,6 +295,12 @@ static void __init xen_init_capabilities(void)
> setup_clear_cpu_cap(X86_FEATURE_ACC);
> setup_clear_cpu_cap(X86_FEATURE_X2APIC);
>
> + /*
> + * Xen PV would need some work to support PCID: CR3 handling as well
> + * as xen_flush_tlb_others() would need updating.
> + */
> + setup_clear_cpu_cap(X86_FEATURE_PCID);
> +
> if (!xen_initial_domain())
> setup_clear_cpu_cap(X86_FEATURE_ACPI);
>
> --
> 2.9.4
>
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
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[PATCH v3 00/11] PCID and improved laziness Andy Lutomirski <luto@kernel.org> - 2017-06-21 07:30 +0200
[PATCH v3 11/11] x86/mm: Try to preserve old TLB entries using PCID Andy Lutomirski <luto@kernel.org> - 2017-06-21 07:30 +0200
Re: [PATCH v3 11/11] x86/mm: Try to preserve old TLB entries using PCID Thomas Gleixner <tglx@linutronix.de> - 2017-06-21 15:40 +0200
Re: [PATCH v3 11/11] x86/mm: Try to preserve old TLB entries using PCID Thomas Gleixner <tglx@linutronix.de> - 2017-06-21 15:50 +0200
Re: [PATCH v3 11/11] x86/mm: Try to preserve old TLB entries using PCID Andy Lutomirski <luto@kernel.org> - 2017-06-22 05:00 +0200
Re: [PATCH v3 11/11] x86/mm: Try to preserve old TLB entries using PCID Thomas Gleixner <tglx@linutronix.de> - 2017-06-22 14:30 +0200
Re: [PATCH v3 11/11] x86/mm: Try to preserve old TLB entries using PCID Andy Lutomirski <luto@kernel.org> - 2017-06-22 20:20 +0200
Re: [PATCH v3 11/11] x86/mm: Try to preserve old TLB entries using PCID Thomas Gleixner <tglx@linutronix.de> - 2017-06-22 23:30 +0200
Re: [PATCH v3 11/11] x86/mm: Try to preserve old TLB entries using PCID Andy Lutomirski <luto@kernel.org> - 2017-06-23 05:10 +0200
Re: [PATCH v3 11/11] x86/mm: Try to preserve old TLB entries using PCID Thomas Gleixner <tglx@linutronix.de> - 2017-06-23 09:30 +0200
Re: [PATCH v3 11/11] x86/mm: Try to preserve old TLB entries using PCID Nadav Amit <nadav.amit@gmail.com> - 2017-06-22 18:20 +0200
Re: [PATCH v3 11/11] x86/mm: Try to preserve old TLB entries using PCID Andy Lutomirski <luto@kernel.org> - 2017-06-22 20:20 +0200
Re: [PATCH v3 11/11] x86/mm: Try to preserve old TLB entries using PCID Borislav Petkov <bp@alien8.de> - 2017-06-26 18:10 +0200
[PATCH v3 08/11] x86/mm: Disable PCID on 32-bit kernels Andy Lutomirski <luto@kernel.org> - 2017-06-21 07:30 +0200
Re: [PATCH v3 08/11] x86/mm: Disable PCID on 32-bit kernels Thomas Gleixner <tglx@linutronix.de> - 2017-06-21 11:30 +0200
Re: [PATCH v3 08/11] x86/mm: Disable PCID on 32-bit kernels Borislav Petkov <bp@alien8.de> - 2017-06-23 11:30 +0200
[PATCH v3 02/11] x86/ldt: Simplify LDT switching logic Andy Lutomirski <luto@kernel.org> - 2017-06-21 07:30 +0200
Re: [PATCH v3 02/11] x86/ldt: Simplify LDT switching logic Thomas Gleixner <tglx@linutronix.de> - 2017-06-21 10:10 +0200
Re: [PATCH v3 02/11] x86/ldt: Simplify LDT switching logic Borislav Petkov <bp@alien8.de> - 2017-06-21 11:50 +0200
[tip:x86/mm] x86/ldt: Simplify the LDT switching logic tip-bot for Andy Lutomirski <tipbot@zytor.com> - 2017-06-22 13:20 +0200
[PATCH v3 01/11] x86/mm: Don't reenter flush_tlb_func_common() Andy Lutomirski <luto@kernel.org> - 2017-06-21 07:30 +0200
Re: [PATCH v3 01/11] x86/mm: Don't reenter flush_tlb_func_common() Thomas Gleixner <tglx@linutronix.de> - 2017-06-21 10:10 +0200
Re: [PATCH v3 01/11] x86/mm: Don't reenter flush_tlb_func_common() Borislav Petkov <bp@alien8.de> - 2017-06-21 10:50 +0200
Re: [PATCH v3 01/11] x86/mm: Don't reenter flush_tlb_func_common() Andy Lutomirski <luto@kernel.org> - 2017-06-21 17:20 +0200
Re: [PATCH v3 01/11] x86/mm: Don't reenter flush_tlb_func_common() Nadav Amit <nadav.amit@gmail.com> - 2017-06-22 01:30 +0200
Re: [PATCH v3 01/11] x86/mm: Don't reenter flush_tlb_func_common() Andy Lutomirski <luto@kernel.org> - 2017-06-22 04:30 +0200
Re: [PATCH v3 01/11] x86/mm: Don't reenter flush_tlb_func_common() Ingo Molnar <mingo@kernel.org> - 2017-06-22 09:40 +0200
[PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking Andy Lutomirski <luto@kernel.org> - 2017-06-21 07:30 +0200
Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking Thomas Gleixner <tglx@linutronix.de> - 2017-06-21 11:10 +0200
Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking Andy Lutomirski <luto@kernel.org> - 2017-06-21 18:30 +0200
Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking Borislav Petkov <bp@alien8.de> - 2017-06-21 19:30 +0200
Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking Borislav Petkov <bp@alien8.de> - 2017-06-22 17:00 +0200
Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking Andy Lutomirski <luto@kernel.org> - 2017-06-22 19:50 +0200
Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking Borislav Petkov <bp@alien8.de> - 2017-06-22 21:10 +0200
Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking Boris Ostrovsky <boris.ostrovsky@oracle.com> - 2017-06-23 15:40 +0200
Re: [PATCH v3 06/11] x86/mm: Rework lazy TLB mode and TLB freshness tracking Andy Lutomirski <luto@kernel.org> - 2017-06-23 17:30 +0200
[PATCH v3 04/11] x86/mm: Give each mm TLB flush generation a unique ID Andy Lutomirski <luto@kernel.org> - 2017-06-21 07:30 +0200
Re: [PATCH v3 04/11] x86/mm: Give each mm TLB flush generation a unique ID Thomas Gleixner <tglx@linutronix.de> - 2017-06-21 10:10 +0200
Re: [PATCH v3 04/11] x86/mm: Give each mm TLB flush generation a unique ID Borislav Petkov <bp@alien8.de> - 2017-06-21 12:40 +0200
Re: [PATCH v3 04/11] x86/mm: Give each mm TLB flush generation a unique ID Andy Lutomirski <luto@kernel.org> - 2017-06-21 18:40 +0200
Re: [PATCH v3 04/11] x86/mm: Give each mm TLB flush generation a unique ID Borislav Petkov <bp@alien8.de> - 2017-06-21 19:10 +0200
Re: [PATCH v3 04/11] x86/mm: Give each mm TLB flush generation a unique ID Borislav Petkov <bp@alien8.de> - 2017-06-21 19:50 +0200
Re: [PATCH v3 04/11] x86/mm: Give each mm TLB flush generation a unique ID Andy Lutomirski <luto@kernel.org> - 2017-06-22 04:40 +0200
[PATCH v3 10/11] x86/mm: Enable CR4.PCIDE on supported systems Andy Lutomirski <luto@kernel.org> - 2017-06-21 07:30 +0200
Re: [PATCH v3 10/11] x86/mm: Enable CR4.PCIDE on supported systems Thomas Gleixner <tglx@linutronix.de> - 2017-06-21 11:40 +0200
Re: [PATCH v3 10/11] x86/mm: Enable CR4.PCIDE on supported systems Thomas Gleixner <tglx@linutronix.de> - 2017-06-21 15:50 +0200
Re: [PATCH v3 10/11] x86/mm: Enable CR4.PCIDE on supported systems Andy Lutomirski <luto@kernel.org> - 2017-06-21 22:40 +0200
Re: [PATCH v3 10/11] x86/mm: Enable CR4.PCIDE on supported systems Borislav Petkov <bp@alien8.de> - 2017-06-23 14:00 +0200
Re: [PATCH v3 10/11] x86/mm: Enable CR4.PCIDE on supported systems Andy Lutomirski <luto@kernel.org> - 2017-06-23 17:30 +0200
Re: [PATCH v3 10/11] x86/mm: Enable CR4.PCIDE on supported systems Boris Ostrovsky <boris.ostrovsky@oracle.com> - 2017-06-23 15:40 +0200
[PATCH v3 07/11] x86/mm: Stop calling leave_mm() in idle code Andy Lutomirski <luto@kernel.org> - 2017-06-21 07:30 +0200
Re: [PATCH v3 07/11] x86/mm: Stop calling leave_mm() in idle code Thomas Gleixner <tglx@linutronix.de> - 2017-06-21 11:30 +0200
Re: [PATCH v3 07/11] x86/mm: Stop calling leave_mm() in idle code Andy Lutomirski <luto@kernel.org> - 2017-06-21 18:30 +0200
Re: [PATCH v3 07/11] x86/mm: Stop calling leave_mm() in idle code Borislav Petkov <bp@alien8.de> - 2017-06-23 11:10 +0200
Re: [PATCH v3 00/11] PCID and improved laziness Linus Torvalds <torvalds@linux-foundation.org> - 2017-06-21 20:30 +0200
Re: [PATCH v3 00/11] PCID and improved laziness Andy Lutomirski <luto@kernel.org> - 2017-06-22 07:30 +0200
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