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Re: [PATCH v2 1/7] staging: ccree: fix hash import/export

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On Thu, Jun 22, 2017 at 04:36:55PM +0300, Gilad Ben-Yossef wrote:
>  static int ssi_ahash_export(struct ahash_request *req, void *out)
>  {
>  	struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
>  	struct ssi_hash_ctx *ctx = crypto_ahash_ctx(ahash);
> +	struct device *dev = &ctx->drvdata->plat_dev->dev;
> +	struct ahash_req_ctx *state = ahash_request_ctx(req);
> +	u8 *curr_buff = state->buff_index ? state->buff1 : state->buff0;
> +	u32 curr_buff_cnt = state->buff_index ? state->buff1_cnt :
> +				state->buff0_cnt;
> +	const u32 tmp = CC_EXPORT_MAGIC;
> +
> +	CHECK_AND_RETURN_UPON_FIPS_ERROR();
>  
> -	return ssi_hash_export(ctx, out);
> +	memcpy(out, &tmp, sizeof(u32));
> +	out += sizeof(u32);
> +
> +	dma_sync_single_for_cpu(dev, state->digest_buff_dma_addr,
> +				ctx->inter_digestsize, DMA_BIDIRECTIONAL);
> +	memcpy(out, state->digest_buff, ctx->inter_digestsize);
> +	out += ctx->inter_digestsize;
> +
> +	if (state->digest_bytes_len_dma_addr) {
> +		dma_sync_single_for_cpu(dev, state->digest_bytes_len_dma_addr,
> +					HASH_LEN_SIZE, DMA_BIDIRECTIONAL);
> +		memcpy(out, state->digest_bytes_len, HASH_LEN_SIZE);
> +	}
> +	out += HASH_LEN_SIZE;

I'm sorry to ask this question now instead of on my first review.  I was
waiting for my other computer to get ready so I could look up how this
is called.  But now that I've looked at it, I'm still not sure how this
is called.

Anyway, my question is, is out zeroed memory?  Should we have something
like:
	} else {
		memset(out, 0, HASH_LEN_SIZE);
	}
	out += HASH_LEN_SIZE;

The ->import() function has a similar snippet.

regards,
dan carpenter

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[PATCH v2 0/7] staging: ccree: bug fixes and TODO items for 4.13 Gilad Ben-Yossef <gilad@benyossef.com> - 2017-06-22 15:40 +0200
  [PATCH v2 7/7] staging: ccree: use signal safe completion wait Gilad Ben-Yossef <gilad@benyossef.com> - 2017-06-22 15:40 +0200
  [PATCH v2 4/7] staging: ccree: remove unused function Gilad Ben-Yossef <gilad@benyossef.com> - 2017-06-22 15:40 +0200
  [PATCH v2 6/7] staging: ccree: add DT bus coherency detection Gilad Ben-Yossef <gilad@benyossef.com> - 2017-06-22 15:40 +0200
  [PATCH v2 5/7] staging: ccree: add clock management support Gilad Ben-Yossef <gilad@benyossef.com> - 2017-06-22 15:40 +0200
    Re: [PATCH v2 5/7] staging: ccree: add clock management support Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-06-23 22:30 +0200
  [PATCH v2 2/7] staging: ccree: register setkey for none hash macs Gilad Ben-Yossef <gilad@benyossef.com> - 2017-06-22 15:40 +0200
    Re: [PATCH v2 2/7] staging: ccree: register setkey for none hash macs Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-06-23 22:30 +0200
      Re: [PATCH v2 2/7] staging: ccree: register setkey for none hash macs Gilad Ben-Yossef <gilad@benyossef.com> - 2017-06-25 08:30 +0200
  [PATCH v2 1/7] staging: ccree: fix hash import/export Gilad Ben-Yossef <gilad@benyossef.com> - 2017-06-22 15:40 +0200
    Re: [PATCH v2 1/7] staging: ccree: fix hash import/export Dan Carpenter <dan.carpenter@oracle.com> - 2017-06-22 16:00 +0200
      Re: [PATCH v2 1/7] staging: ccree: fix hash import/export Gilad Ben-Yossef <gilad@benyossef.com> - 2017-06-25 08:30 +0200
  Re: [PATCH v2 3/7] staging: ccree: add support for older HW revisions Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-06-23 22:30 +0200

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