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Re: [PATCH 1/9] clk: clk-divider: add CLK_DIVIDER_ZERO_GATE clk support

From Stephen Boyd <sboyd@codeaurora.org>
Newsgroups linux.kernel
Subject Re: [PATCH 1/9] clk: clk-divider: add CLK_DIVIDER_ZERO_GATE clk support
Date 2017-06-20 03:50 +0200
Message-ID <tUgsN-247-5@gated-at.bofh.it> (permalink)
References <tRNOi-4yK-11@gated-at.bofh.it> <tUgsN-247-7@gated-at.bofh.it>
Organization linux.* mail to news gateway

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On 05/15, Dong Aisheng wrote:
> ---
>  drivers/clk/clk-divider.c    | 2 ++
>  include/linux/clk-provider.h | 4 ++++
>  2 files changed, 6 insertions(+)
> 
> diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
> index 96386ff..f78ba7a 100644
> --- a/drivers/clk/clk-divider.c
> +++ b/drivers/clk/clk-divider.c
> @@ -125,6 +125,8 @@ unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate,
>  
>  	div = _get_div(table, val, flags, divider->width);
>  	if (!div) {
> +		if (flags & CLK_DIVIDER_ZERO_GATE)
> +			return 0;
>  		WARN(!(flags & CLK_DIVIDER_ALLOW_ZERO),

Why not use the CLK_DIVIDER_ALLOW_ZERO flag? A clk being off
doesn't mean the rate is 0. The divider is just disabled, so we
would consider the rate as whatever the parent is, which is what
this code does before this patch. Similarly, we don't do anything
about gate clocks and return a rate of 0 when they're disabled.

>  			"%s: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set\n",
>  			clk_hw_get_name(hw));

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

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Re: [PATCH 1/9] clk: clk-divider: add CLK_DIVIDER_ZERO_GATE clk  support Stephen Boyd <sboyd@codeaurora.org> - 2017-06-20 03:50 +0200
  Re: [PATCH 1/9] clk: clk-divider: add CLK_DIVIDER_ZERO_GATE clk  support Dong Aisheng <dongas86@gmail.com> - 2017-06-20 11:10 +0200
    RE: [PATCH 1/9] clk: clk-divider: add CLK_DIVIDER_ZERO_GATE clk  support "A.s. Dong" <aisheng.dong@nxp.com> - 2017-06-26 05:10 +0200
    Re: [PATCH 1/9] clk: clk-divider: add CLK_DIVIDER_ZERO_GATE clk  support Stephen Boyd <sboyd@codeaurora.org> - 2017-07-01 03:00 +0200
      RE: [PATCH 1/9] clk: clk-divider: add CLK_DIVIDER_ZERO_GATE clk  support "A.s. Dong" <aisheng.dong@nxp.com> - 2017-07-03 05:50 +0200

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