[PATCH v3 10/11] ARC: [plat-eznps] handle dedicated AUX registers

From	Noam Camus <noamca@mellanox.com>
Newsgroups	linux.kernel
Subject	[PATCH v3 10/11] ARC: [plat-eznps] handle dedicated AUX registers
Date	2017-06-15 10:50 +0200
Message-ID	<tSyDx-cv-31@gated-at.bofh.it> (permalink)
References	<tSyDv-cv-3@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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From: Liav Rehana <liavr@mellanox.com>

Preserve eflags and gpa1 auxiliaries during exception
Registers used by compare exchange instructions.
GPA1 is used for compare value, and EFLAGS got bit reflects
atomic operation response.

EFLAGS is zeroed for each new user task so it won't get its
parent value.

Signed-off-by: Noam Camus <noamc@ezchip.com>
---
 arch/arc/include/asm/entry-compact.h |   24 ++++++++++++++++++++++++
 arch/arc/include/asm/ptrace.h        |    5 +++++
 arch/arc/kernel/process.c            |    4 ++++
 3 files changed, 33 insertions(+), 0 deletions(-)

diff --git a/arch/arc/include/asm/entry-compact.h b/arch/arc/include/asm/entry-compact.h
index 14c310f..9e4458a 100644
--- a/arch/arc/include/asm/entry-compact.h
+++ b/arch/arc/include/asm/entry-compact.h
@@ -192,6 +192,12 @@
 	PUSHAX	lp_start
 	PUSHAX	erbta
 
+#ifdef CONFIG_ARC_PLAT_EZNPS
+	.word CTOP_INST_SCHD_RW
+	PUSHAX  CTOP_AUX_GPA1
+	PUSHAX  CTOP_AUX_EFLAGS
+#endif
+`
 	lr	r9, [ecr]
 	st      r9, [sp, PT_event]    /* EV_Trap expects r9 to have ECR */
 .endm
@@ -208,6 +214,12 @@
  * by hardware and that is not good.
  *-------------------------------------------------------------*/
 .macro EXCEPTION_EPILOGUE
+#ifdef CONFIG_ARC_PLAT_EZNPS
+	.word CTOP_INST_SCHD_RW
+	POPAX   CTOP_AUX_EFLAGS
+	POPAX   CTOP_AUX_GPA1
+#endif
+
 	POPAX	erbta
 	POPAX	lp_start
 	POPAX	lp_end
@@ -265,6 +277,12 @@
 	PUSHAX	lp_end
 	PUSHAX	lp_start
 	PUSHAX	bta_l\LVL\()
+
+#ifdef CONFIG_ARC_PLAT_EZNPS
+	.word CTOP_INST_SCHD_RW
+	PUSHAX  CTOP_AUX_GPA1
+	PUSHAX  CTOP_AUX_EFLAGS
+#endif
 .endm
 
 /*--------------------------------------------------------------
@@ -277,6 +295,12 @@
  * by hardware and that is not good.
  *-------------------------------------------------------------*/
 .macro INTERRUPT_EPILOGUE  LVL
+#ifdef CONFIG_ARC_PLAT_EZNPS
+	.word CTOP_INST_SCHD_RW
+	POPAX   CTOP_AUX_EFLAGS
+	POPAX   CTOP_AUX_GPA1
+#endif
+
 	POPAX	bta_l\LVL\()
 	POPAX	lp_start
 	POPAX	lp_end
diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h
index 5297faa..5a8cb22 100644
--- a/arch/arc/include/asm/ptrace.h
+++ b/arch/arc/include/asm/ptrace.h
@@ -19,6 +19,11 @@
 #ifdef CONFIG_ISA_ARCOMPACT
 struct pt_regs {
 
+#ifdef CONFIG_ARC_PLAT_EZNPS
+	unsigned long eflags;	/* Extended FLAGS */
+	unsigned long gpa1;	/* General Purpose Aux */
+#endif
+
 	/* Real registers */
 	unsigned long bta;	/* bta_l1, bta_l2, erbta */
 
diff --git a/arch/arc/kernel/process.c b/arch/arc/kernel/process.c
index 5c631a1..5ac3b54 100644
--- a/arch/arc/kernel/process.c
+++ b/arch/arc/kernel/process.c
@@ -234,6 +234,10 @@ void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long usp)
 	 */
 	regs->status32 = STATUS_U_MASK | STATUS_L_MASK | ISA_INIT_STATUS_BITS;
 
+#ifdef CONFIG_EZNPS_MTM_EXT
+	regs->eflags = 0;
+#endif
+
 	/* bogus seed values for debugging */
 	regs->lp_start = 0x10;
 	regs->lp_end = 0x80;
-- 
1.7.1

Thread

[PATCH v3 00/11] plat-eznps upstream cont. set 2 Noam Camus <noamca@mellanox.com> - 2017-06-15 10:50 +0200
  [PATCH v3 05/11] ARC: Support more than one PGDIR for KVADDR Noam Camus <noamca@mellanox.com> - 2017-06-15 10:50 +0200
  [PATCH v3 01/11] ARC: set level of log per CPU during boot to be info level Noam Camus <noamca@mellanox.com> - 2017-06-15 10:50 +0200
  [PATCH v3 09/11] ARC: [plat-eznps] Save/Restore extra auxiliary registers Noam Camus <noamca@mellanox.com> - 2017-06-15 10:50 +0200
  [PATCH v3 06/11] ARC: [NUMA] added CONFIG_NUMA for plat-eznps Noam Camus <noamca@mellanox.com> - 2017-06-15 10:50 +0200
  [PATCH v3 07/11] ARC: [plat-eznps] new command line argument for HW scheduler at MTM Noam Camus <noamca@mellanox.com> - 2017-06-15 10:50 +0200
  [PATCH v3 10/11] ARC: [plat-eznps] handle dedicated AUX registers Noam Camus <noamca@mellanox.com> - 2017-06-15 10:50 +0200
  [PATCH v3 02/11] ARC: send ipi to all cpus sharing task mm in case of page fault Noam Camus <noamca@mellanox.com> - 2017-06-15 10:50 +0200
  [PATCH v3 04/11] ARC: Add CPU topology Noam Camus <noamca@mellanox.com> - 2017-06-15 10:50 +0200

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