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Re: [PATCH v2 2/4] perf/x86: Fix data source decoding for Skylake

From Peter Zijlstra <peterz@infradead.org>
Newsgroups linux.kernel
Subject Re: [PATCH v2 2/4] perf/x86: Fix data source decoding for Skylake
Date 2017-06-08 10:20 +0200
Message-ID <tQ0PE-1Le-17@gated-at.bofh.it> (permalink)
References <tPSyJ-4M5-11@gated-at.bofh.it> <tPSyL-4M5-51@gated-at.bofh.it>
Organization linux.* mail to news gateway

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On Wed, Jun 07, 2017 at 04:22:24PM -0700, Andi Kleen wrote:

> diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
> index b1c0b187acfe..95daade294d7 100644
> --- a/include/uapi/linux/perf_event.h
> +++ b/include/uapi/linux/perf_event.h
> @@ -931,14 +931,18 @@ union perf_mem_data_src {
>  			mem_snoop:5,	/* snoop mode */
>  			mem_lock:2,	/* lock instr */
>  			mem_dtlb:7,	/* tlb access */
> -			mem_rsvd:31;
> +			mem_lvlx:8,	/* memory hierarchy level, ext */
> +			mem_snoopx:2,	/* snoop mode, ext */
> +			mem_rsvd:21;
>  	};
>  };
>  #elif defined(__BIG_ENDIAN_BITFIELD)
>  union perf_mem_data_src {
>  	__u64 val;
>  	struct {
> -		__u64	mem_rsvd:31,
> +		__u64	mem_rsvd:21,
> +			mem_snoopx:2,	/* snoop mode, ext */
> +			mem_lvlx:8,	/* memory hierarchy level, ext */
>  			mem_dtlb:7,	/* tlb access */
>  			mem_lock:2,	/* lock instr */
>  			mem_snoop:5,	/* snoop mode */

So one thing we could do is add a mem_hops field and always set that,
even for the old stuff. The old stuff will not know about that field and
ignore the bits, but new stuff will then not need as many LVL bits.

Of course, we then get into the problem of how many bits of hops we
need.. Power guys ?

> @@ -975,6 +979,16 @@ union perf_mem_data_src {
>  #define PERF_MEM_LVL_UNC	0x2000 /* Uncached memory */
>  #define PERF_MEM_LVL_SHIFT	5
>  
> +#define PERF_MEM_LVLX_L4	0x01 /* L4 */
> +#define PERF_MEM_LVLX_REM_L4    0x02 /* Remote L4 */
> +#define PERF_MEM_LVLX_REM_RAM	0x04 /* Remote Ram, unknown hops */
> +#define PERF_MEM_LVLX_PMEM	0x08 /* Persistent Memory */
> +#define PERF_MEM_LVLX_REM_PMEM	0x10 /* Remote Persistent Memory */
> +#define PERF_MEM_LVLX_REM_NA	0x20 /* Remote N/A level */

Still wondering what the point of REM_NA is.. can you explain?

> +/* 2 free */
> +
> +#define PERF_MEM_LVLX_SHIFT	33
> +
>  /* snoop mode */
>  #define PERF_MEM_SNOOP_NA	0x01 /* not available */
>  #define PERF_MEM_SNOOP_NONE	0x02 /* no snoop */
> @@ -983,6 +997,10 @@ union perf_mem_data_src {
>  #define PERF_MEM_SNOOP_HITM	0x10 /* snoop hit modified */
>  #define PERF_MEM_SNOOP_SHIFT	19
>  
> +#define PERF_MEM_SNOOPX_FWD	0x01 /* forward */
> +/* 1 free */
> +#define PERF_MEM_SNOOPX_SHIFT	41
> +
>  /* locked instruction */
>  #define PERF_MEM_LOCK_NA	0x01 /* not available */
>  #define PERF_MEM_LOCK_LOCKED	0x02 /* locked transaction */
> -- 
> 2.9.4
> 

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Thread

Fix Skylake PEBS data source for perf Andi Kleen <andi@firstfloor.org> - 2017-06-08 01:30 +0200
  [PATCH v2 2/4] perf/x86: Fix data source decoding for Skylake Andi Kleen <andi@firstfloor.org> - 2017-06-08 01:30 +0200
    Re: [PATCH v2 2/4] perf/x86: Fix data source decoding for Skylake Peter Zijlstra <peterz@infradead.org> - 2017-06-08 10:20 +0200
      Re: [PATCH v2 2/4] perf/x86: Fix data source decoding for Skylake Stephane Eranian <eranian@google.com> - 2017-06-08 21:50 +0200
        Re: [PATCH v2 2/4] perf/x86: Fix data source decoding for Skylake Peter Zijlstra <peterz@infradead.org> - 2017-06-08 22:10 +0200
          Re: [PATCH v2 2/4] perf/x86: Fix data source decoding for Skylake Andi Kleen <ak@linux.intel.com> - 2017-06-09 18:50 +0200
        Re: [PATCH v2 2/4] perf/x86: Fix data source decoding for Skylake Andi Kleen <andi@firstfloor.org> - 2017-06-08 22:20 +0200
          Re: [PATCH v2 2/4] perf/x86: Fix data source decoding for Skylake Peter Zijlstra <peterz@infradead.org> - 2017-06-08 22:30 +0200
      Re: [PATCH v2 2/4] perf/x86: Fix data source decoding for Skylake Madhavan Srinivasan <maddy@linux.vnet.ibm.com> - 2017-06-09 10:10 +0200

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