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[PATCH 04/10] irqchip: sunxi-nmi: const-ify sunxi_sc_nmi_reg_offs structures

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The sunxi_sc_nmi_reg_offs, which hold the register offsets for the
various variants, is never modified, and only used at init time within
the init functions referenced by IRQCHIP_DECLARE, which themselves are
tagged __init.

Const-ify the sunxi_sc_nmi_reg_offs structures, and tag them as
__initconst.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 drivers/irqchip/irq-sunxi-nmi.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/irqchip/irq-sunxi-nmi.c b/drivers/irqchip/irq-sunxi-nmi.c
index 76f2431b6b7b..e713ec66322b 100644
--- a/drivers/irqchip/irq-sunxi-nmi.c
+++ b/drivers/irqchip/irq-sunxi-nmi.c
@@ -52,19 +52,19 @@ struct sunxi_sc_nmi_reg_offs {
 	u32 enable;
 };
 
-static struct sunxi_sc_nmi_reg_offs sun6i_reg_offs = {
+static const struct sunxi_sc_nmi_reg_offs sun6i_reg_offs __initconst = {
 	.ctrl	= SUN6I_NMI_CTRL,
 	.pend	= SUN6I_NMI_PENDING,
 	.enable	= SUN6I_NMI_ENABLE,
 };
 
-static struct sunxi_sc_nmi_reg_offs sun7i_reg_offs = {
+static const struct sunxi_sc_nmi_reg_offs sun7i_reg_offs __initconst = {
 	.ctrl	= SUN7I_NMI_CTRL,
 	.pend	= SUN7I_NMI_PENDING,
 	.enable	= SUN7I_NMI_ENABLE,
 };
 
-static struct sunxi_sc_nmi_reg_offs sun9i_reg_offs = {
+static const struct sunxi_sc_nmi_reg_offs sun9i_reg_offs __initconst = {
 	.ctrl	= SUN9I_NMI_CTRL,
 	.pend	= SUN9I_NMI_PENDING,
 	.enable	= SUN9I_NMI_ENABLE,
@@ -142,7 +142,7 @@ static int sunxi_sc_nmi_set_type(struct irq_data *data, unsigned int flow_type)
 }
 
 static int __init sunxi_sc_nmi_irq_init(struct device_node *node,
-					struct sunxi_sc_nmi_reg_offs *reg_offs)
+					const struct sunxi_sc_nmi_reg_offs *reg_offs)
 {
 	struct irq_domain *domain;
 	struct irq_chip_generic *gc;
-- 
2.11.0

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[PATCH 00/10] irqchip: sunxi-nmi: Cleanups and fix A31 R_INTC register offset Chen-Yu Tsai <wens@csie.org> - 2017-06-06 08:00 +0200
  [PATCH 08/10] ARM: sun8i: a23/a33: Use new sun6i-a31-r-intc compatible for NMI/R_INTC Chen-Yu Tsai <wens@csie.org> - 2017-06-06 08:10 +0200
  [PATCH 03/10] irqchip: sunxi-nmi: Reorder sunxi_sc_nmi_reg_offs' in ascending order Chen-Yu Tsai <wens@csie.org> - 2017-06-06 08:10 +0200
  [PATCH 02/10] irqchip: sunxi-nmi: Document interrupt disabling and clearing at probe time Chen-Yu Tsai <wens@csie.org> - 2017-06-06 08:10 +0200
  [PATCH 06/10] irqchip: sunxi-nmi: Support sun6i-a31-r-intc compatible Chen-Yu Tsai <wens@csie.org> - 2017-06-06 08:10 +0200
  [PATCH 05/10] dt-bindings: interrupt-controller: sunxi-nmi: Add compatible for A31 R_INTC Chen-Yu Tsai <wens@csie.org> - 2017-06-06 08:10 +0200
  [PATCH 07/10] ARM: sun6i: a31: Use new sun6i-a31-r-intc compatible for NMI/R_INTC Chen-Yu Tsai <wens@csie.org> - 2017-06-06 08:10 +0200
  [PATCH 09/10] ARM: sun8i: a83t: Add device node for R_INTC interrupt controller Chen-Yu Tsai <wens@csie.org> - 2017-06-06 08:10 +0200
  [PATCH 10/10] arm64: allwinner: a64: add NMI (R_INTC) controller on A64 Chen-Yu Tsai <wens@csie.org> - 2017-06-06 08:10 +0200
  [PATCH 04/10] irqchip: sunxi-nmi: const-ify sunxi_sc_nmi_reg_offs structures Chen-Yu Tsai <wens@csie.org> - 2017-06-06 08:10 +0200
  Re: [PATCH 00/10] irqchip: sunxi-nmi: Cleanups and fix A31 R_INTC register offset Icenowy Zheng <icenowy@aosc.io> - 2017-06-06 17:40 +0200
  Re: [PATCH 00/10] irqchip: sunxi-nmi: Cleanups and fix A31 R_INTC  register offset Marc Zyngier <marc.zyngier@arm.com> - 2017-06-06 17:40 +0200
  Re: [PATCH 00/10] irqchip: sunxi-nmi: Cleanups and fix A31 R_INTC  register offset Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-06-06 20:50 +0200

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