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Groups > linux.kernel > #1657466
| From | Russell King - ARM Linux <linux@armlinux.org.uk> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH] arm: LPAE: kexec: clear TTBCR.T1SZ explicitly when PHYS_OFFSET > PAGE_OFFSET |
| Date | 2017-06-05 11:40 +0200 |
| Message-ID | <tOWEq-193-25@gated-at.bofh.it> (permalink) |
| References | <tOWuK-160-27@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Mon, Jun 05, 2017 at 06:22:20PM +0900, Hoeun Ryu wrote: > diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S > index 5e5720e..9ac2bec 100644 > --- a/arch/arm/mm/proc-v7-3level.S > +++ b/arch/arm/mm/proc-v7-3level.S > @@ -140,6 +140,7 @@ ENDPROC(cpu_v7_set_pte_ext) > * otherwise booting secondary CPUs would end up using TTBR1 for the > * identity mapping set up in TTBR0. > */ > + bichi \tmp, \tmp, #(1 << 16) @ clear TTBCR.T1SZ This looks insufficient. There's two bits here: * TTBR0/TTBR1 split (PAGE_OFFSET): * 0x40000000: T0SZ = 2, T1SZ = 0 (not used) * 0x80000000: T0SZ = 0, T1SZ = 1 * 0xc0000000: T0SZ = 0, T1SZ = 2 but you seem to only be clearing one bit. -- RMK's Patch system: http://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up according to speedtest.net.
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[PATCH] arm: LPAE: kexec: clear TTBCR.T1SZ explicitly when PHYS_OFFSET > PAGE_OFFSET Hoeun Ryu <hoeun.ryu@gmail.com> - 2017-06-05 11:30 +0200
Re: [PATCH] arm: LPAE: kexec: clear TTBCR.T1SZ explicitly when PHYS_OFFSET > PAGE_OFFSET Russell King - ARM Linux <linux@armlinux.org.uk> - 2017-06-05 11:40 +0200
Re: [PATCH] arm: LPAE: kexec: clear TTBCR.T1SZ explicitly when PHYS_OFFSET > PAGE_OFFSET Hoeun Ryu <hoeun.ryu@gmail.com> - 2017-06-05 12:10 +0200
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