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Re: [PATCH v11 4/6] ARM: dts: imx6q-evi: support altera-ps-spi

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Am 02.06.2017 um 21:39 schrieb stillcompiling@gmail.com:
> On Friday, June 2, 2017 6:30:12 PM PDT Andreas Färber wrote:
>> Am 25.05.2017 um 19:29 schrieb Joshua Clayton:
>>> diff --git a/arch/arm/boot/dts/imx6q-evi.dts
>>> b/arch/arm/boot/dts/imx6q-evi.dts index 24fe093a66db..a0cbb2d84803 100644
>>> --- a/arch/arm/boot/dts/imx6q-evi.dts
>>> +++ b/arch/arm/boot/dts/imx6q-evi.dts
>>> @@ -82,6 +82,15 @@
>>>
>>>  	pinctrl-names = "default";
>>>  	pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1cs>;
>>>  	status = "okay";
>>>
>>> +
>>> +	fpga_spi: cyclonespi@0 {
>>
>> "cyclonespi" does not strike me as the best node name.
>>
>> I am guessing this is a sub-node of a SPI controller node, so no need to
>> repeat "spi", and Cyclone seems more or less implied by "altr,fpga-".
> True.
>>
>> Note that the example in the bindings doc uses "evi-fpga-spi". Nodes
>> don't need to be (shouldn't be?) prefixed with the board. Note that
>> bindings examples tend to get copied a lot.
>>
>> Any reason not to just use "fpga@0" in both places for simplicity?
> Sure. fpga: fpga@0 is probably better.

Note that I was only commenting on the node name, the latter part.

I'm not aware of any rules for the label, so that could remain unchanged
or adopt cyclone_spi from the old node name or whatever is unique and
syntactically valid.

> I'll change it in both the dts and the binding doc.

Thanks. Maybe double-check if there's any conventions Xilinx/Lattice DTs
are using.

Cheers,
Andreas

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[PATCH v11 0/6] FPGA Manager support for altera passive serial Joshua Clayton <stillcompiling@gmail.com> - 2017-05-25 19:40 +0200
  [PATCH v11 5/6] lib: add bitrev8x4() Joshua Clayton <stillcompiling@gmail.com> - 2017-05-25 19:40 +0200
  [PATCH v11 3/6] fpga manager: Add altera-ps-spi driver for Altera FPGAs Joshua Clayton <stillcompiling@gmail.com> - 2017-05-25 19:40 +0200
  [PATCH v11 4/6] ARM: dts: imx6q-evi: support altera-ps-spi Joshua Clayton <stillcompiling@gmail.com> - 2017-05-25 19:40 +0200
    Re: [PATCH v11 4/6] ARM: dts: imx6q-evi: support altera-ps-spi Andreas Färber <afaerber@suse.de> - 2017-06-02 18:40 +0200
      Re: [PATCH v11 4/6] ARM: dts: imx6q-evi: support altera-ps-spi stillcompiling@gmail.com - 2017-06-02 21:40 +0200
        Re: [PATCH v11 4/6] ARM: dts: imx6q-evi: support altera-ps-spi Andreas Färber <afaerber@suse.de> - 2017-06-02 22:00 +0200
          Re: [PATCH v11 4/6] ARM: dts: imx6q-evi: support altera-ps-spi stillcompiling@gmail.com - 2017-06-02 23:20 +0200
            Re: [PATCH v11 4/6] ARM: dts: imx6q-evi: support altera-ps-spi Alan Tull <atull@kernel.org> - 2017-06-05 17:20 +0200
  [PATCH v11 1/6] fpga: Add flag to indicate SPI bitstream is bit-reversed Joshua Clayton <stillcompiling@gmail.com> - 2017-05-25 19:40 +0200
  Re: [PATCH v11 0/6] FPGA Manager support for altera passive serial Anatolij Gustschin <agust@denx.de> - 2017-06-02 18:00 +0200
  [PATCH v12 1/6] fpga: Add flag to indicate SPI bitstream is bit-reversed Joshua Clayton <stillcompiling@gmail.com> - 2017-06-02 22:40 +0200
    [PATCH v12 5/6] lib: add bitrev8x4() Joshua Clayton <stillcompiling@gmail.com> - 2017-06-02 22:40 +0200
      Re: [PATCH v12 5/6] lib: add bitrev8x4() Alan Tull <atull@kernel.org> - 2017-06-05 17:20 +0200
    [PATCH v12 3/6] fpga manager: Add altera-ps-spi driver for Altera FPGAs Joshua Clayton <stillcompiling@gmail.com> - 2017-06-02 22:40 +0200
      Re: [PATCH v12 3/6] fpga manager: Add altera-ps-spi driver for Altera FPGAs Alan Tull <atull@kernel.org> - 2017-06-05 17:20 +0200
    [PATCH v12 2/6] doc: dt: document altera-passive-serial binding Joshua Clayton <stillcompiling@gmail.com> - 2017-06-02 22:40 +0200
      Re: [PATCH v12 2/6] doc: dt: document altera-passive-serial binding Alan Tull <atull@kernel.org> - 2017-06-05 17:20 +0200
    [PATCH v12 4/6] ARM: dts: imx6q-evi: support altera-ps-spi Joshua Clayton <stillcompiling@gmail.com> - 2017-06-02 22:40 +0200
      Re: [PATCH v12 4/6] ARM: dts: imx6q-evi: support altera-ps-spi Alan Tull <atull@kernel.org> - 2017-06-05 17:20 +0200
    Re: [PATCH v12 1/6] fpga: Add flag to indicate SPI bitstream is bit-reversed Alan Tull <atull@kernel.org> - 2017-06-05 17:20 +0200

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