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Groups > linux.kernel > #1654692
| From | sathyanarayanan.kuppuswamy@linux.intel.com |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v5 4/8] mfd: intel_soc_pmic_bxtwc: Remove second level irq for gpio device |
| Date | 2017-06-01 00:50 +0200 |
| Message-ID | <tNkBb-2ET-11@gated-at.bofh.it> (permalink) |
| References | <tN5Vw-1DA-31@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Currently all PMIC GPIO domain irqs are consumed by the same
device(bxt_wcove_gpio), so there is no need to export them as
separate interrupts. We can just export only the first level
GPIO irq(BXTWC_GPIO_LVL1_IRQ) as an irq resource and let the
GPIO device driver(bxt_wcove_gpio) handle the GPIO sub domain
irqs based on status value of GPIO level2 interrupt status
register. Also, just using only the first level irq will eliminate
the bug involved in requesting only the second level irq and not
explicitly enable the first level irq. For more info on this
issue please read the details at,
https://lkml.org/lkml/2017/2/27/148
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>
---
drivers/mfd/intel_soc_pmic_bxtwc.c | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)
Changes since v1:
* None
Changes since v2:
* Rebased on top of latest release.
Changes since v3:
* None
diff --git a/drivers/mfd/intel_soc_pmic_bxtwc.c b/drivers/mfd/intel_soc_pmic_bxtwc.c
index 7c1ed27..af11c43 100644
--- a/drivers/mfd/intel_soc_pmic_bxtwc.c
+++ b/drivers/mfd/intel_soc_pmic_bxtwc.c
@@ -89,8 +89,6 @@ enum bxtwc_irqs_level2 {
BXTWC_USBC_IRQ,
BXTWC_CHGR0_IRQ,
BXTWC_CHGR1_IRQ,
- BXTWC_GPIO0_IRQ,
- BXTWC_GPIO1_IRQ,
BXTWC_CRIT_IRQ,
};
@@ -116,8 +114,6 @@ static const struct regmap_irq bxtwc_regmap_irqs_level2[] = {
REGMAP_IRQ_REG(BXTWC_USBC_IRQ, 2, BIT(5)),
REGMAP_IRQ_REG(BXTWC_CHGR0_IRQ, 2, 0x1f),
REGMAP_IRQ_REG(BXTWC_CHGR1_IRQ, 3, 0x1f),
- REGMAP_IRQ_REG(BXTWC_GPIO0_IRQ, 4, 0xff),
- REGMAP_IRQ_REG(BXTWC_GPIO1_IRQ, 5, 0x3f),
REGMAP_IRQ_REG(BXTWC_CRIT_IRQ, 6, 0x03),
};
@@ -153,8 +149,7 @@ static struct regmap_irq_chip bxtwc_regmap_irq_chip_tmu = {
};
static struct resource gpio_resources[] = {
- DEFINE_RES_IRQ_NAMED(BXTWC_GPIO0_IRQ, "GPIO0"),
- DEFINE_RES_IRQ_NAMED(BXTWC_GPIO1_IRQ, "GPIO1"),
+ DEFINE_RES_IRQ_NAMED(BXTWC_GPIO_LVL1_IRQ, "GPIO"),
};
static struct resource adc_resources[] = {
--
2.7.4
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[GIT PULL] Immutable branch between MFD, GPIO, Thermal and X86 due for the v4.13 merge window Lee Jones <lee.jones@linaro.org> - 2017-05-30 11:00 +0200
Re: [GIT PULL] Immutable branch between MFD, GPIO, Thermal and X86 due for the v4.13 merge window Stephen Rothwell <sfr@canb.auug.org.au> - 2017-05-31 05:40 +0200
Re: [GIT PULL] Immutable branch between MFD, GPIO, Thermal and X86 due for the v4.13 merge window Sathyanarayanan Kuppuswamy Natarajan <sathyaosid@gmail.com> - 2017-05-31 06:30 +0200
Re: [GIT PULL] Immutable branch between MFD, GPIO, Thermal and X86 due for the v4.13 merge window Lee Jones <lee.jones@linaro.org> - 2017-05-31 09:00 +0200
Re: [GIT PULL] Immutable branch between MFD, GPIO, Thermal and X86 due for the v4.13 merge window sathyanarayanan kuppuswamy <sathyanarayanan.kuppuswamy@linux.intel.com> - 2017-06-01 00:40 +0200
Re: [GIT PULL] Immutable branch between MFD, GPIO, Thermal and X86 due for the v4.13 merge window Darren Hart <dvhart@infradead.org> - 2017-06-03 19:10 +0200
Re: [GIT PULL] Immutable branch between MFD, GPIO, Thermal and X86 due for the v4.13 merge window Sathyanarayanan Kuppuswamy Natarajan <sathyaosid@gmail.com> - 2017-05-31 06:30 +0200
Re: [GIT PULL] Immutable branch between MFD, GPIO, Thermal and X86 due for the v4.13 merge window Lee Jones <lee.jones@linaro.org> - 2017-05-31 09:00 +0200
Re: [GIT PULL] Immutable branch between MFD, GPIO, Thermal and X86 due for the v4.13 merge window Lee Jones <lee.jones@linaro.org> - 2017-05-31 09:10 +0200
[PATCH v5 8/8] platform/x86: intel_bxtwc_tmu: Remove first level irq unmask sathyanarayanan.kuppuswamy@linux.intel.com - 2017-06-01 00:50 +0200
[PATCH v5 4/8] mfd: intel_soc_pmic_bxtwc: Remove second level irq for gpio device sathyanarayanan.kuppuswamy@linux.intel.com - 2017-06-01 00:50 +0200
[PATCH v5 6/8] mfd: intel_soc_pmic_bxtwc: Utilize devm_* functions in driver probe sathyanarayanan.kuppuswamy@linux.intel.com - 2017-06-01 00:50 +0200
Re: [PATCH v5 6/8] mfd: intel_soc_pmic_bxtwc: Utilize devm_* functions in driver probe Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-06-03 15:10 +0200
[PATCH v5 3/8] thermal: intel_bxt_pmic_thermal: Use first level PMIC thermal irq sathyanarayanan.kuppuswamy@linux.intel.com - 2017-06-01 00:50 +0200
Re: [PATCH v5 3/8] thermal: intel_bxt_pmic_thermal: Use first level PMIC thermal irq Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-06-03 15:10 +0200
Re: [PATCH v5 3/8] thermal: intel_bxt_pmic_thermal: Use first level PMIC thermal irq Sathyanarayanan Kuppuswamy Natarajan <sathyaosid@gmail.com> - 2017-06-03 19:30 +0200
Re: [PATCH v5 3/8] thermal: intel_bxt_pmic_thermal: Use first level PMIC thermal irq Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-06-03 19:40 +0200
Re: [PATCH v5 3/8] thermal: intel_bxt_pmic_thermal: Use first level PMIC thermal irq Sathyanarayanan Kuppuswamy Natarajan <sathyaosid@gmail.com> - 2017-06-03 20:00 +0200
Re: [PATCH v5 3/8] thermal: intel_bxt_pmic_thermal: Use first level PMIC thermal irq Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-06-03 20:20 +0200
[PATCH v6 6/6] platform/x86: intel_bxtwc_tmu: Remove first level IRQ unmask sathyanarayanan.kuppuswamy@linux.intel.com - 2017-06-05 21:20 +0200
[PATCH v6 2/6] mfd: intel_soc_pmic_bxtwc: Remove thermal second level IRQs sathyanarayanan.kuppuswamy@linux.intel.com - 2017-06-05 21:20 +0200
[PATCH v6 5/6] mfd: intel_soc_pmic_bxtwc: Use chained IRQs for second level IRQ chips sathyanarayanan.kuppuswamy@linux.intel.com - 2017-06-05 21:20 +0200
Re: [PATCH v6 5/6] mfd: intel_soc_pmic_bxtwc: Use chained IRQs for second level IRQ chips Heikki Krogerus <heikki.krogerus@linux.intel.com> - 2017-06-06 11:40 +0200
[PATCH v6 1/6] mfd: intel_soc_pmic_bxtwc: Fix TMU interrupt index sathyanarayanan.kuppuswamy@linux.intel.com - 2017-06-05 21:20 +0200
[PATCH v6 4/6] mfd: intel_soc_pmic_bxtwc: Utilize devm_* functions in driver probe sathyanarayanan.kuppuswamy@linux.intel.com - 2017-06-05 21:20 +0200
[PATCH v6 3/6] mfd: intel_soc_pmic_bxtwc: Remove second level IRQ for gpio device sathyanarayanan.kuppuswamy@linux.intel.com - 2017-06-05 21:20 +0200
[PATCH v6 0/6] mfd: intel_soc_pmic_bxtwc: Add chained IRQ support sathyanarayanan.kuppuswamy@linux.intel.com - 2017-06-05 21:20 +0200
Re: [PATCH v6 0/6] mfd: intel_soc_pmic_bxtwc: Add chained IRQ support Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-06-06 11:40 +0200
[PATCH v5 0/8] mfd: intel_soc_pmic_bxtwc: Add chained IRQ support sathyanarayanan.kuppuswamy@linux.intel.com - 2017-06-01 00:50 +0200
Re: [PATCH v5 0/8] mfd: intel_soc_pmic_bxtwc: Add chained IRQ support Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-06-03 15:30 +0200
[PATCH v5 7/8] mfd: intel_soc_pmic_bxtwc: Use chained irqs for second level irq chips sathyanarayanan.kuppuswamy@linux.intel.com - 2017-06-01 00:50 +0200
Re: [PATCH v5 7/8] mfd: intel_soc_pmic_bxtwc: Use chained irqs for second level irq chips Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-06-03 15:30 +0200
[PATCH v5 2/8] mfd: intel_soc_pmic_bxtwc: Remove thermal second level irqs sathyanarayanan.kuppuswamy@linux.intel.com - 2017-06-01 00:50 +0200
[PATCH v5 5/8] gpio: gpio-wcove: Use first level PMIC GPIO irq sathyanarayanan.kuppuswamy@linux.intel.com - 2017-06-01 00:50 +0200
Re: [PATCH v5 5/8] gpio: gpio-wcove: Use first level PMIC GPIO irq Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-06-03 15:10 +0200
[PATCH v5 1/8] mfd: intel_soc_pmic_bxtwc: Fix TMU interrupt index sathyanarayanan.kuppuswamy@linux.intel.com - 2017-06-01 00:50 +0200
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