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Groups > linux.kernel > #1652542
| From | Benoît Thébaudeau <benoit@wsystem.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v2 4/5] mmc: sdhci-esdhc-imx: Allow all supported prescaler values |
| Date | 2017-05-29 16:00 +0200 |
| Message-ID | <tMtnc-ED-25@gated-at.bofh.it> (permalink) |
| References | <tMtnc-ED-19@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On i.MX, SYSCTL.SDCLKFS may always be set to 0 in order to make the SD clock frequency prescaler divide by 1 in SDR mode, even with the eSDHC. The previous minimum prescaler value of 2 in SDR mode with the eSDHC was a code remnant from PowerPC, which actually has this limitation on earlier revisions. In DDR mode, the prescaler can divide by up to 512. The maximum SD clock frequency in High Speed mode is 50 MHz. On i.MX25, this change makes it possible to get 48 MHz from the USB PLL (240 MHz / 5 / 1) instead of only 40 MHz from the USB PLL (240 MHz / 3 / 2) or 33.25 MHz from the AHB clock (133 MHz / 2 / 2). Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> --- Changes v1 -> v2: none. --- drivers/mmc/host/sdhci-esdhc-imx.c | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index a0b7d4c..e0d06d9 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -674,7 +674,8 @@ static inline void esdhc_pltfm_set_clock(struct sdhci_host *host, struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host); unsigned int host_clock = pltfm_host->clock; - int pre_div = 2; + int ddr_pre_div = imx_data->is_ddr ? 2 : 1; + int pre_div = 1; int div = 1; u32 temp, val; @@ -689,28 +690,23 @@ static inline void esdhc_pltfm_set_clock(struct sdhci_host *host, return; } - if (esdhc_is_usdhc(imx_data) && !imx_data->is_ddr) - pre_div = 1; - temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL); temp &= ~(ESDHC_CLOCK_IPGEN | ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN | ESDHC_CLOCK_MASK); sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL); - while (host_clock / pre_div / 16 > clock && pre_div < 256) + while (host_clock / (16 * pre_div * ddr_pre_div) > clock && + pre_div < 256) pre_div *= 2; - while (host_clock / pre_div / div > clock && div < 16) + while (host_clock / (div * pre_div * ddr_pre_div) > clock && div < 16) div++; - host->mmc->actual_clock = host_clock / pre_div / div; + host->mmc->actual_clock = host_clock / (div * pre_div * ddr_pre_div); dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n", clock, host->mmc->actual_clock); - if (imx_data->is_ddr) - pre_div >>= 2; - else - pre_div >>= 1; + pre_div >>= 1; div--; temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL); -- 2.7.4
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[PATCH v2 1/5] mmc: sdhci-esdhc-imx: Fix some English mistakes and typos Benoît Thébaudeau <benoit@wsystem.com> - 2017-05-29 16:00 +0200 [PATCH v2 4/5] mmc: sdhci-esdhc-imx: Allow all supported prescaler values Benoît Thébaudeau <benoit@wsystem.com> - 2017-05-29 16:00 +0200 [PATCH v2 2/5] mmc: sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR Benoît Thébaudeau <benoit@wsystem.com> - 2017-05-29 16:00 +0200 [PATCH v2 5/5] mmc: sdhci-esdhc-imx: Remove the ENGcm07207 workaround Benoît Thébaudeau <benoit@wsystem.com> - 2017-05-29 16:00 +0200 [PATCH v2 3/5] mmc: sdhci-esdhc-imx: Fix DAT line software reset Benoît Thébaudeau <benoit@wsystem.com> - 2017-05-29 16:00 +0200 Re: [PATCH v2 1/5] mmc: sdhci-esdhc-imx: Fix some English mistakes and typos Fabio Estevam <festevam@gmail.com> - 2017-05-29 16:10 +0200 Re: [PATCH v2 1/5] mmc: sdhci-esdhc-imx: Fix some English mistakes and typos Adrian Hunter <adrian.hunter@intel.com> - 2017-05-30 08:50 +0200
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